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Searched refs:SSCR1_TIE (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-armada100/
A Dspi.h44 #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ macro
/u-boot/include/
A DSA-1100.h1065 #define SSCR1_TIE 0x00000002 /* Transmit FIFO 1/2-full or less */ macro

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