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Searched refs:SSSR_ROR (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-armada100/
A Dspi.h75 #define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */ macro
/u-boot/include/
A DSA-1100.h1089 #define SSSR_ROR 0x00000040 /* Receive FIFO Over-Run */ macro

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