Searched refs:STM32_VREFBUF_CSR (Results 1 – 1 of 1) sorted by relevance
22 #define STM32_VREFBUF_CSR 0x00 macro48 if (enable && !(readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR)) { in stm32_vrefbuf_set_enable()56 clrbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ); in stm32_vrefbuf_set_enable()60 clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR, in stm32_vrefbuf_set_enable()71 ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val, in stm32_vrefbuf_set_enable()75 clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR, in stm32_vrefbuf_set_enable()87 return readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR; in stm32_vrefbuf_get_enable()97 clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, in stm32_vrefbuf_set_value()111 val = readl(priv->base + STM32_VREFBUF_CSR) & STM32_VRS; in stm32_vrefbuf_get_value()
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