| /u-boot/board/freescale/ls1088a/ |
| A D | README | 16 SW1 0011 0001
23 SW1 0010 0000
30 SW1 0010 0000
72 SW1 0001 0010
76 SW1 0011 0001
80 SW1 0010 0000
84 SW1 0010 0000
88 SW1 0010 0100
|
| /u-boot/board/kobol/helios4/ |
| A D | README | 23 Before powering up the board, boot selection should be done via the SW1 dip
37 Set the SW1 DIP switches to UART boot (see above).
|
| /u-boot/board/variscite/dart_6ul/ |
| A D | README | 20 Boot switch position: SW1 -> 0
34 Boot switch position: SW1 -> 0
|
| /u-boot/board/myir/mys_6ulx/ |
| A D | README | 20 Boot switch position: SW1 -> 0
45 Boot switch position: SW1 -> 1
|
| /u-boot/doc/ |
| A D | README.pblimage | 41 Change SW1[1:5] = off off on off on.
49 Change SW1[1:5] = off off on on off.
58 Change SW1[1:5] = off on off off on
|
| A D | README.mpc85xxcds | 132 SW1=01101100
157 SW1=10001111
171 SW1=11111101
|
| /u-boot/board/solidrun/clearfog/ |
| A D | README | 46 Before powering up the board, boot selection should be done via the SW1 dip
65 Set the SW1 DIP switches to UART boot (see above).
|
| /u-boot/board/freescale/p2041rdb/ |
| A D | README | 37 SW1[1-5] = 10110
60 SW1[1-5] = 01100
85 SW1[1-5] = 10100
|
| /u-boot/board/freescale/t104xrdb/ |
| A D | README | 286 SW1: 00010011
291 SW1: 10001000
296 SW1: 00100010
301 SW1: 00100000
308 SW1: 00010011
313 SW1: 10001000
318 SW1: 00100010
323 SW1: 00100000
|
| /u-boot/include/power/ |
| A D | mc34vr500_pmic.h | 165 SW1 = 0, enumerator
|
| /u-boot/board/freescale/p1010rdb/ |
| A D | README.P1010RDB-PB | 64 SW1[1:8]= 10101010
91 SW1[4:7] SW5[1] SW5[5:8] SW2[2] Core(MHz) Platform(MHz) DDR(MT/s)
152 set SW1[8]=0, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
156 set SW1[8]=1, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
|
| A D | README.P1010RDB-PA | 124 or set SW1[8]= ON
126 SW1[8]= OFF: Upper bank used for booting start
127 SW1[8]= ON: Lower bank used for booting start
|
| /u-boot/board/boundary/nitrogen6x/ |
| A D | README.mx6qsabrelite | 43 the board). Make sure SW1 switch is at position "00", so that it can boot
106 3. Make sure SW1 switch is at position "01", so that it can boot from USB OTG.
118 6. Ensure SW1 is returned to "00" to boot from the fuses once done.
|
| /u-boot/board/google/imx8mq_phanbell/ |
| A D | README | 37 Set Boot switch SW1: 1011 to boot from Micro SD.
|
| /u-boot/board/freescale/t208xrdb/ |
| A D | README | 146 SW1[1:8] = '00010011'
159 set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot
178 set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot
189 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot
198 set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot
|
| /u-boot/doc/board/freescale/ |
| A D | b4860qds.rst | 141 SW1 OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0]
156 SW1 [1.1] = 0
162 SW1 [1.1] = 1
174 SW1 OFF[0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0] OFF [0]
189 SW1 [1.1] = 0
195 SW1 [1.1] = 1
|
| /u-boot/board/freescale/t102xrdb/ |
| A D | README | 194 set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot
196 set SW1[1:8] = '00010111', SW2[1] = '1', SW3[4] = '0' for NOR boot
223 set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot
237 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot
248 set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot
|
| /u-boot/arch/arm/dts/ |
| A D | imx7ulp-evk.dts | 91 sw1_reg: SW1 {
92 regulator-name = "SW1";
|
| A D | tegra30-apalis.dts | 122 /* SW1: +V1.35_VDDIO_DDR */
|
| A D | r8a7794-silk.dts | 13 * SW1: 2-1: AK4643
|
| /u-boot/board/freescale/t208xqds/ |
| A D | README | 171 set SW1[1:8] = '00010011', SW2[1] = '1', SW6[1:4] = '0000' for NOR boot
190 set SW1[1:8] = '10000010', SW2[1] = '0' and SW6[1:4] = '1001' for NAND boot
201 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot
212 set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot
|
| /u-boot/board/freescale/m54455evb/ |
| A D | README | 181 3.1 SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
182 SW1 Pin4: 0 - ULPI chip not in reset state or 1 - ULPI chip in reset state
183 SW1 Pin5: 0 - Full ATA Bus enabled, FEC Phy1 powered down
185 SW1 Pin6: 0 - FEC Phy0 active or 1 - FEC Phy0 powered down
186 SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
|
| /u-boot/board/ti/ks2_evm/ |
| A D | README | 97 to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
148 Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
168 Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
|
| /u-boot/board/freescale/ls1028a/ |
| A D | README | 84 SW1 : 1000_0000
96 SW1 : 1111_0000
|
| /u-boot/doc/board/st/ |
| A D | stm32mp1.rst | 269 - on the **daugther board ed1 = MB1263** with the switch SW1
271 - on board **DK1/DK2** with the switch SW1 = BOOT0, BOOT2
|