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Searched refs:SW2 (Results 1 – 24 of 24) sorted by relevance

/u-boot/board/freescale/ls1088a/
A DREADME17 SW2 x100 0000
24 SW2 0100 0000
31 SW2 1100 0000
73 SW2 x110 1111
77 SW2 0110 1111
81 SW2 0110 1111
85 SW2 1110 1111
89 SW2 1110 1111
/u-boot/doc/
A DREADME.mpc85xxcds88 SW2[2] on the carrier card before resetting the board in order to set the
101 The first two bits of SW2 control how flash is used on the board:
105 SW2=00XXXXXX FLASH: Boot bank 1, bank 2 available.
114 connected.. By convention, the user-specific bits of SW2 are used to
119 SW2=xxxxxx00 PCI SLOT INFORM: The CDS carrier is in slot0 of the Arcadia
133 SW2=0x1111yy x=Flash bank, yy=PCI slot
158 SW2=01000111
172 SW2=10011111
A DREADME.uniphier423 SW2 OFF(1)/ON(0) Description
/u-boot/board/sbc8548/
A DREADME36 card. [The above discussion assumes that the SW2[1-4] has not been changed
194 alternate setting, you also need to switch SW2.8 to ON.
207 SW2.1 CFG_SYS_PLL0 1 0*
208 SW2.2 CFG_SYS_PLL1 1* 0
209 SW2.3 CFG_SYS_PLL2 1* 0
210 SW2.4 CFG_SYS_PLL3 1 0*
211 SW2.5 CFG_CORE_PLL0 1* 0
212 SW2.6 CFG_CORE_PLL1 1 0*
213 SW2.7 CFG_CORE_PLL2 1* 0
214 SW2.8 CFG_ROM_LOC1 1 0*
/u-boot/board/variscite/dart_6ul/
A DREADME21 SW2 -> 0
35 SW2 -> 1
/u-boot/board/myir/mys_6ulx/
A DREADME21 SW2 -> 1
46 SW2 -> 0
/u-boot/arch/arm/dts/
A Dr8a7792-blanche.dts117 label = "SW2-1";
124 label = "SW2-2";
131 label = "SW2-3";
138 label = "SW2-4";
A Dr8a7793-gose.dts70 label = "SW2-1";
77 label = "SW2-2";
84 label = "SW2-3";
91 label = "SW2-4";
A Dimx7ulp-evk.dts99 sw2_reg: SW2 {
100 regulator-name = "SW2";
A Dr8a7791-koelsch.dts84 label = "SW2-1";
91 label = "SW2-2";
98 label = "SW2-3";
105 label = "SW2-4";
A Dr8a7790-lager.dts83 label = "SW2-1";
90 label = "SW2-2";
97 label = "SW2-3";
104 label = "SW2-4";
A Dtegra30-apalis.dts130 /* SW2: +V1.05 */
/u-boot/board/freescale/ls1028a/
A DREADME14 SW2: 1111_1000
19 SW2: 1000_1000
24 SW2: 1001_1000
85 SW2 : 1110_0110
97 SW2 : 0000_0110
/u-boot/board/freescale/t104xrdb/
A DREADME287 SW2: 10111011
292 SW2: 00111011
297 SW2: 10111011
302 SW2: 00111011
309 SW2: 10111001
314 SW2: 00111001
319 SW2: 10111001
324 SW2: 00111001
/u-boot/include/power/
A Dmc34vr500_pmic.h166 SW2, enumerator
/u-boot/board/freescale/mpc837xemds/
A DREADME18 SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2.
19 SW2[1:8]= 0000_0001 refers to bits labeled 1 through 7 is set as "On"
/u-boot/board/freescale/t208xrdb/
A DREADME147 SW2[1:8] = '10111111'
159 set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot
178 set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot
189 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot
198 set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot
/u-boot/board/freescale/imx8qm_mek/
A DREADME54 Set Boot switch SW2: 1100.
/u-boot/doc/board/freescale/
A Dimx8qxp_mek.rst66 Set Boot switch SW2: 1100.
A Db4860qds.rst142 SW2 ON ON ON ON ON ON OFF OFF
157 SW2 [1.1] = 1
163 SW2 [1.1] = 0
175 SW2 ON OFF ON OFF ON ON OFF OFF
190 SW2 [1.1] = 1
196 SW2 [1.1] = 0
/u-boot/board/freescale/t102xrdb/
A DREADME194 set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot
196 set SW1[1:8] = '00010111', SW2[1] = '1', SW3[4] = '0' for NOR boot
223 set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot
237 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot
248 set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot
/u-boot/doc/board/advantech/
A Dimx8qm-rom7720-a1.rst75 Set Boot switch SW2: 1100.
/u-boot/board/freescale/t208xqds/
A DREADME171 set SW1[1:8] = '00010011', SW2[1] = '1', SW6[1:4] = '0000' for NOR boot
190 set SW1[1:8] = '10000010', SW2[1] = '0' and SW6[1:4] = '1001' for NAND boot
201 set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot
212 set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot
/u-boot/board/freescale/p1010rdb/
A DREADME.P1010RDB-PB65 SW2[1:8]= 11011000
91 SW1[4:7] SW5[1] SW5[5:8] SW2[2] Core(MHz) Platform(MHz) DDR(MT/s)

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