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Searched refs:SWSCI (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/x86/include/asm/arch-ivybridge/
A Dsandybridge.h95 #define SWSCI 0xe8 /* SWSCI enable */ macro
/u-boot/arch/x86/cpu/intel_common/
A Dintel_opregion.c73 sci_reg = SWSCI; in intel_gma_opregion_register()
/u-boot/arch/x86/include/asm/
A Dintel_opregion.h16 #define SWSCI 0xe8 /* SWSCI Register */ macro
/u-boot/arch/x86/
A DKconfig1046 register (0xe0) rather than the SWSCI register (0xe8).

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