Searched refs:SYSCTL_BASE (Results 1 – 9 of 9) sorted by relevance
/u-boot/arch/mips/mach-mtmips/mt7620/ |
A D | serial.c | 14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in board_debug_uart_init() 27 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
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A D | init.c | 30 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in cpu_pll_init() 86 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_get_clks() 148 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo() 189 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in _machine_restart()
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A D | dram.c | 59 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_memc_reset() 74 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7620_dram_init()
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A D | mt7620.h | 13 #define SYSCTL_BASE 0x10000000 macro
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/u-boot/arch/mips/mach-mtmips/mt7628/ |
A D | init.c | 24 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in set_init_timer_freq() 57 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in print_cpuinfo()
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A D | serial.c | 15 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init()
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A D | mt7628.h | 11 #define SYSCTL_BASE 0x10000000 macro
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A D | ddr.c | 67 void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_memc_reset() 137 sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mt7628_ddr_init()
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A D | lowlevel_init.S | 34 li t1, KSEG1ADDR(SYSCTL_BASE + SYSCTL_ROM_STATUS_REG) 35 li t2, KSEG1ADDR(SYSCTL_BASE + SYSCTL_CLKCFG0_REG)
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