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Searched refs:SYSCTL_SYSCFG1_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-mtmips/mt7620/
A Dsysc.c104 clrsetbits_32(priv->base + SYSCTL_SYSCFG1_REG, in mt7620_sysc_ioctl()
117 clrsetbits_32(priv->base + SYSCTL_SYSCFG1_REG, in mt7620_sysc_ioctl()
130 clrsetbits_32(priv->base + SYSCTL_SYSCFG1_REG, in mt7620_sysc_ioctl()
A Dmt7620.h44 #define SYSCTL_SYSCFG1_REG 0x14 macro

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