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Searched refs:SZ_16K (Results 1 – 9 of 9) sorted by relevance

/u-boot/drivers/mtd/nand/raw/
A Dnand_ids.c63 SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
74 SZ_16K, SZ_8K, SZ_4M, NAND_NEED_SCRAMBLING, 6, 1664,
83 LEGACY_ID_NAND("NAND 16MiB 1,8V 8-bit", 0x33, 16, SZ_16K, SP_OPTIONS),
84 LEGACY_ID_NAND("NAND 16MiB 3,3V 8-bit", 0x73, 16, SZ_16K, SP_OPTIONS),
85 LEGACY_ID_NAND("NAND 16MiB 1,8V 16-bit", 0x43, 16, SZ_16K, SP_OPTIONS16),
86 LEGACY_ID_NAND("NAND 16MiB 3,3V 16-bit", 0x53, 16, SZ_16K, SP_OPTIONS16),
88 LEGACY_ID_NAND("NAND 32MiB 1,8V 8-bit", 0x35, 32, SZ_16K, SP_OPTIONS),
89 LEGACY_ID_NAND("NAND 32MiB 3,3V 8-bit", 0x75, 32, SZ_16K, SP_OPTIONS),
93 LEGACY_ID_NAND("NAND 64MiB 1,8V 8-bit", 0x36, 64, SZ_16K, SP_OPTIONS),
94 LEGACY_ID_NAND("NAND 64MiB 3,3V 8-bit", 0x76, 64, SZ_16K, SP_OPTIONS),
[all …]
/u-boot/include/linux/
A Dsizes.h28 #define SZ_16K 0x00004000 macro
/u-boot/include/configs/
A Dcorvus.h103 #define CONFIG_SPL_STACK (SZ_16K)
A Dtaurus.h169 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
A Dsmartweb.h172 #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
/u-boot/arch/arm/mach-imx/imx8/
A Dimage.c221 end = ROUND(end, SZ_16K); in spl_nand_get_uboot_raw_page()
/u-boot/board/ge/b1x5v2/
A Dspl.c357 #define CFG_MFG_ADDR_OFFSET (spi->size - SZ_16K)
466 spi_flash_protect(spi, CFG_MFG_ADDR_OFFSET, SZ_16K, true); in memory_init()
/u-boot/board/congatec/cgtqmx6eval/
A Dcgtqmx6eval.c998 #define CFG_MFG_ADDR_OFFSET (spi->size - SZ_16K)
/u-boot/drivers/mmc/
A Dmmc.c1467 0, SZ_16K / 512, SZ_32K / 512, in sd_read_ssr()

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