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Searched refs:TRAINING_ECC_MUX_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_regs.h249 #define TRAINING_ECC_MUX_MASK 0x1 macro
A Dddr3_training_leveling.c1698 reg_mask = (TRAINING_ECC_MUX_MASK << TRAINING_ECC_MUX_OFFS) | in mv_ddr_rl_dqs_burst()

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