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Searched refs:TSC_CNTCR_ENABLE (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/include/asm/arch-tegra114/
A Dsysctr.h21 #define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ macro
/u-boot/arch/arm/include/asm/arch-tegra124/
A Dsysctr.h22 #define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ macro
/u-boot/arch/arm/include/asm/arch-tegra210/
A Dsysctr.h22 #define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ macro
/u-boot/arch/arm/mach-tegra/tegra114/
A Dclock.c732 val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; in arch_timer_init()
/u-boot/arch/arm/mach-tegra/tegra124/
A Dclock.c930 val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; in arch_timer_init()
/u-boot/arch/arm/mach-tegra/tegra210/
A Dclock.c1065 val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; in arch_timer_init()

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