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Searched refs:TTBR0_IRGN_WT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/lib/
A Dcache-cp15.c193 reg |= TTBR0_RGN_WT | TTBR0_IRGN_WT; in mmu_setup()
/u-boot/arch/arm/include/asm/
A Dsystem.h535 #define TTBR0_IRGN_WT (1 << 0 | 0 << 6) macro

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