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Searched refs:TX (Results 1 – 25 of 57) sorted by relevance

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/u-boot/doc/device-tree-bindings/net/
A Dmicrel-ksz90x1.txt49 - txen-skew-ps : Skew control of TX CTL pad
54 - txd0-skew-ps : Skew control of TX data 0 pad
55 - txd1-skew-ps : Skew control of TX data 1 pad
56 - txd2-skew-ps : Skew control of TX data 2 pad
57 - txd3-skew-ps : Skew control of TX data 3 pad
135 - txc-skew-ps : Skew control of TX clock pad
140 - txen-skew-ps : Skew control of TX CTL pad
145 - txd0-skew-ps : Skew control of TX data 0 pad
146 - txd1-skew-ps : Skew control of TX data 1 pad
147 - txd2-skew-ps : Skew control of TX data 2 pad
[all …]
A Dethernet.txt29 * "rgmii" (RX and TX delays are added by the MAC when required)
30 * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
31 MAC should not add the RX or TX delays in this case)
34 * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
35 should not add an TX delay in this case)
A Dsnps,dwc-qos-ethernet.txt26 In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX
28 drive the PHY TX path.
116 - snps,txpbl: DMA Programmable burst length for the TX DMA
118 - snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during
119 TX low-power mode.
/u-boot/arch/arm/dts/
A Dmeson-gxbb-nanopi-k2.dts197 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
210 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
211 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
246 "Bluetooth UART TX", "Bluetooth UART RX",
A Darmada-8040-mcbin.dts88 * [40,41] CP0 UART1 TX/RX
94 * [51] 2.5G SFP TX fault
223 * [10] CP1 10G SFP TX Disable
230 * [24] CP1 2.5G SFP TX Disable
231 * [26] CP0 10G SFP TX Fault
234 * [29] CP0 10G SFP TX Disable
A Darmada-8040-puzzle-m801.dts76 * AP UART 1 RX/TX [7-8]
98 * [40,41] CP0 UART1 TX/RX
104 * [51] 2.5G SFP TX fault
298 * [10] CP1 10G SFP TX Disable
305 * [24] CP1 2.5G SFP TX Disable
306 * [26] CP0 10G SFP TX Fault
309 * [29] CP0 10G SFP TX Disable
A Dsama5d3_can.dtsi21 …AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS…
29 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
A Dmeson-gxbb-odroidc2.dts255 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
268 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
269 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
A Dkirkwood-blackarmor-nas220.dts97 * pin 1 - TX (CPU's TX)
A Dmeson-gxl-s905x-khadas-vim.dts115 gpio-line-names = "UART TX",
162 "Bluetooth UART TX", "Bluetooth UART RX",
A Domap3.dtsi492 <59>, /* TX interrupt */
511 <62>, /* TX interrupt */
531 <89>, /* TX interrupt */
550 <54>, /* TX interrupt */
569 <81>, /* TX interrupt */
A Dr8a77995-draak.dts179 * TX clock internal delay mode is required for reliable
181 * the Draak board, however, TX clock internal delay mode
A Dstm32mp15xx-dhcom-drc02.dts35 * during TX anyway and that it only controls drive enable DE
/u-boot/arch/arm/mach-mediatek/
A DKconfig33 I2S, PCM, S/PDIF, UART, SPI, I2C, IR TX/RX, and PWM.
61 Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo
70 Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo
/u-boot/drivers/usb/eth/
A DKconfig30 Supports 10Base-T/ 100Base-TX/1000Base-T.
40 Supports 10Base-T/ 100Base-TX/1000Base-T.
/u-boot/drivers/net/
A Dfsl_enetc.c455 ENETC_BDR(TX, ENETC_TX_BDR_ID, ENETC_TBCIR); in enetc_setup_tx_bdr()
457 ENETC_BDR(TX, ENETC_TX_BDR_ID, ENETC_TBPIR); in enetc_setup_tx_bdr()
460 enetc_bdr_write(priv, TX, ENETC_TX_BDR_ID, ENETC_TBBAR0, in enetc_setup_tx_bdr()
462 enetc_bdr_write(priv, TX, ENETC_TX_BDR_ID, ENETC_TBBAR1, in enetc_setup_tx_bdr()
465 enetc_bdr_write(priv, TX, ENETC_TX_BDR_ID, ENETC_TBLENR, in enetc_setup_tx_bdr()
473 enetc_bdr_write(priv, TX, ENETC_TX_BDR_ID, ENETC_TBMR, ENETC_TBMR_EN); in enetc_setup_tx_bdr()
A Dfsl_enetc.h32 enum enetc_bdr_type {TX, RX}; enumerator
A Dmacb.c291 #define TX 0 macro
373 macb_flush_ring_desc(macb, TX); in _macb_send()
382 macb_invalidate_ring_desc(macb, TX); in _macb_send()
920 macb_flush_ring_desc(macb, TX); in _macb_init()
/u-boot/doc/device-tree-bindings/mailbox/
A Dk3-secure-proxy.txt36 # TX thread ID is 5.
/u-boot/doc/device-tree-bindings/firmware/
A Dnvidia,tegra186-bpmp.txt17 - shmem : List of the phandle of the TX and RX shared memory area that
62 The shared memory area for the IPC TX and RX between CPU and BPMP are
/u-boot/board/ste/stemmy/
A DREADME47 With a ~619kOhm resistor between ID and GND, 1.8V RX/TX is available at D+/D-.
/u-boot/doc/device-tree-bindings/soc/fsl/cpm_qe/qe/
A Ducc.txt31 Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
/u-boot/drivers/usb/musb/
A Dmusb_udc.c91 TX, enumerator
360 SET_EP0_STATE(TX); in musb_peri_ep0_tx_data_request()
624 if (TX == ep0_state) in musb_peri_ep0()
/u-boot/tools/
A Dk3_gen_x509_cert.sh46 ST = TX
/u-boot/doc/device-tree-bindings/pinctrl/
A Dkendryte,k210-fpioa.txt91 /* UART with an active-high TX status LED */

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