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/u-boot/drivers/serial/
A DKconfig202 prompt "Select which UART will provide the debug UART"
215 bool "Altera UART"
232 bool "ARC UART"
235 Select this to enable a debug UART using the ARC UART driver.
249 bool "BCM6345 UART"
377 bool "SiFive UART"
397 Select this to enable a debug UART using the UniPhier on-chip UART.
415 UART driver.
424 Select this to enable a debug UART using the UART driver for
447 The UART input clock determines the speed of the internal UART
[all …]
A Dserial_pxa.c179 #define pxa_uart(uart, UART) \ argument
182 return pxa_init_dev(UART##_INDEX); \
187 return pxa_setbrg_dev(UART##_INDEX); \
192 return pxa_putc_dev(UART##_INDEX, c); \
197 return pxa_puts_dev(UART##_INDEX, s); \
202 return pxa_getc_dev(UART##_INDEX); \
207 return pxa_tstc_dev(UART##_INDEX); \
223 #define pxa_uart_multi(uart, UART) \ argument
224 pxa_uart(uart, UART) \
/u-boot/board/congatec/conga-qeval20-qa3-e3845/
A DREADME2 U-Boot console UART selection:
6 configurations (defconfig files). The only difference is the UART that
7 is used as the U-Boot console UART. The default defconfig file:
13 board (conga-QEVAL). This UART is the one provided with a SubD9
18 provides the U-Boot console on the BayTrail internal legacy UART,
21 RS232 level shifters. So a TTL-USB UART adapter does not work in
23 RS232 level signals of the PC UART via some adapter cable.
/u-boot/arch/x86/include/asm/arch-apollolake/acpi/
A Dlpss.asl15 /* LPIO1 HS-UART #1 */
18 Name (_DDN, "Intel(R) HS-UART Controller #1")
21 /* LPIO1 HS-UART #2 */
24 Name (_DDN, "Intel(R) HS-UART Controller #2")
27 /* LPIO1 HS-UART #3 */
30 Name (_DDN, "Intel(R) HS-UART Controller #3")
33 /* LPIO1 HS-UART #4 */
36 Name (_DDN, "Intel(R) HS-UART Controller #4")
/u-boot/arch/arm/
A DKconfig.debug16 bool "Low-level debugging via 8250 UART"
19 their output to an 8250 UART. You can use this option
20 to provide the parameters for the 8250 UART rather than
41 hex "Physical base address of debug UART"
51 int "Register offset shift for the 8250 debug UART"
56 bool "Use 32-bit accesses for 8250 UART"
61 bool "Enable flow control for 8250 UART"
/u-boot/doc/device-tree-bindings/serial/
A Daltera_uart.txt1 Altera UART
7 - clock-frequency : frequency of the clock input to the UART
A Dxilinx_uartlite.txt5 - reg: Should contain UART controller registers location and length.
6 - interrupts: Should contain UART controller interrupts.
A Dbcm2835-aux-uart.txt1 * BCM283x mini UART
6 - clock: input clock frequency for the UART (used to calculate the baud
A Dpl01x.txt1 * ARM AMBA Primecell PL011 & PL010 serial UART
6 - clock: input clock frequency for the UART (used to calculate the baud
A Dqca,ar9330-uart.txt1 * Qualcomm Atheros AR9330 High-Speed UART
12 Each UART port must have an alias correctly numbered in "aliases"
A D8250.txt1 * UART (Universal Asynchronous Receiver/Transmitter)
26 - clock-frequency : the input clock frequency for the UART
32 - current-speed : the current active speed of the UART.
37 accesses to the UART (e.g. TI davinci).
42 - fifo-size: the fifo size of the UART.
A Daltera_jtaguart.txt1 Altera JTAG UART
/u-boot/board/solidrun/clearfog/
A DREADME35 Consider initial boot from UART (see below).
52 - UART: 01001 [1]
54 [1]: According to SolidRun's manual, 11110 should be used for UART booting on
59 Boot from UART:
65 Set the SW1 DIP switches to UART boot (see above).
71 Use the correct UART device node for /dev/ttyUSBX.
/u-boot/board/kobol/helios4/
A DREADME29 - UART: 11110
31 Boot from UART:
37 Set the SW1 DIP switches to UART boot (see above).
43 Use the correct UART device node for /dev/ttyUSBX.
/u-boot/arch/x86/cpu/baytrail/
A DKconfig31 bool "Enable the SoC integrated legacy UART"
33 There is a legacy UART integrated into the Bay Trail SoC.
35 reason, it is recommended that the UART port be used for
/u-boot/arch/arm/dts/
A Dk3-j7200-common-proc-board.dts131 /* Wakeup UART is used by System firmware */
141 /* MAIN UART 2 is used by R5F firmware */
146 /* UART not brought out */
151 /* UART not brought out */
156 /* UART not brought out */
161 /* UART not brought out */
166 /* UART not brought out */
171 /* UART not brought out */
176 /* UART not brought out */
A Dkirkwood-openrd.dtsi61 * mode for the second UART.
66 * To use the second UART, you need to change also
78 * SelUARTorSD selects between the second UART
81 * Low: UART
A Dmeson-gxl-s905x-khadas-vim.dts115 gpio-line-names = "UART TX",
116 "UART RX",
162 "Bluetooth UART TX", "Bluetooth UART RX",
163 "Bluetooth UART CTS", "Bluetooth UART RTS",
/u-boot/board/ste/stemmy/
A DREADME41 8. After reboot U-Boot prompt should appear via UART.
43 UART
46 UART is available through the micro USB port, similar to the Carkit standard.
49 Make sure to connect the UART cable *before* turning on the phone.
/u-boot/arch/arm/mach-mediatek/
A DKconfig21 including UART, SPI, USB3.0, SD and MMC cards, NAND, SNFI, PWM, PCIe,
33 I2S, PCM, S/PDIF, UART, SPI, I2C, IR TX/RX, and PWM.
43 switch, USB3.0, PCIe, UART, SPI, I2C and PWM.
51 including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM,
60 including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM,
69 including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM,
/u-boot/board/mikrotik/crs3xx-98dx3236/
A DREADME10 - UART @ 115200bps
14 - UART boot (using kwboot) and console
/u-boot/arch/mips/mach-bmips/
A DKconfig137 ethernet ports, 2 USB ports, 1 UART, GPIO buttons and LEDs, and
148 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
159 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
170 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and a
181 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
192 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
203 ethernet ports, 3 USB ports, 1 UART, GPIO buttons and LEDs, and
214 ethernet ports, 1 UART, GPIO buttons and LEDs, and a BCM43225
225 ethernet ports, 2 USB ports, 1 UART, GPIO buttons and LEDs, and a
236 ethernet ports, 1 UART, GPIO buttons and LEDs, and a BCM4312
[all …]
/u-boot/arch/arm/mach-bcm283x/
A DKconfig72 mini UART (rather than PL011) for the serial console. This is the
73 default on the RPi Zero W. To enable the UART console, the following
89 VideoCore firmware to select the PL011 UART for the console by:
111 mini UART (rather than PL011) for the serial console. This is the
112 default on the RPi 3. To enable the UART console, the following non-
127 mini UART (rather than PL011) for the serial console. This is the
128 default on the RPi 3. To enable the UART console, the following non-
155 mini UART (rather than PL011) for the serial console. This is the
156 default on the RPi 4. To enable the UART console, the following non-
174 mini UART (rather than PL011) for the serial console. This is the
[all …]
/u-boot/arch/arm/mach-stm32mp/cmd_stm32prog/
A DKconfig28 bool "support stm32prog over UART"
34 and UART protocol.
/u-boot/board/freescale/ls1012afrdm/
A DREADME30 - UART
31 - UART (Console): UART1 (Without flow control) for console
40 - 24 MHz for SC16IS740IPW SPI to Dual UART bridge

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