Searched refs:UART1_CTS (Results 1 – 14 of 14) sorted by relevance
| /u-boot/doc/device-tree-bindings/pinctrl/ |
| A D | marvell,armada-cp110-pinctrl.txt | 78 4 MSS_UART_RXD UART1_CTS PCIe0_CLKREQ
116 42 MSS_UART_TXD SPI0_MISO UART1_CTS
126 52 SPI1_CSn[2] - UART1_CTS
132 58 AU_I2SDI SPI0_MISO UART1_CTS
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| /u-boot/arch/arm/include/asm/arch-omap5/ |
| A D | mux_omap5.h | 114 #define UART1_CTS 0x00a2 macro
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| /u-boot/arch/arm/dts/ |
| A D | stm32mp15xx-dhcom-drc02.dts | 143 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
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| A D | da850.dtsi | 141 /* UART1_CTS UART1_RTS */
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| /u-boot/board/logicpd/omap3som/ |
| A D | omap3logic.h | 143 MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); /*UART1_CTS*/ in set_muxconf_regs()
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| /u-boot/drivers/pinctrl/ |
| A D | pinctrl-kendryte.c | 370 FUNC(UART1_CTS, IN),
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| /u-boot/board/ti/am3517crane/ |
| A D | am3517crane.h | 204 MUX_VAL(CP(UART1_CTS), (M7))\
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| /u-boot/board/lg/sniper/ |
| A D | sniper.h | 192 MUX_VAL(CP(UART1_CTS), (IEN | PTD | DIS | M0)) /* uart1_cts */ \
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| /u-boot/board/logicpd/am3517evm/ |
| A D | am3517evm.h | 232 MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) \
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| /u-boot/board/corscience/tricorder/ |
| A D | tricorder.h | 205 MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150*/ \
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| /u-boot/board/technexion/tao3530/ |
| A D | tao3530.h | 210 MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) \
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| /u-boot/board/ti/evm/ |
| A D | evm.h | 228 MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\
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| /u-boot/board/timll/devkit8000/ |
| A D | devkit8000.h | 208 MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150*/ \
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| /u-boot/board/ti/beagle/ |
| A D | beagle.h | 216 MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150*/ \
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