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Searched refs:UART1_RTS (Results 1 – 14 of 14) sorted by relevance

/u-boot/doc/device-tree-bindings/pinctrl/
A Dmarvell,armada-cp110-pinctrl.txt79 5 MSS_UART_TXD UART1_RTS PCIe1_CLKREQ
117 43 MSS_UART_RXD SPI0_CSn[0] UART1_RTS
120 46 - - UART1_RTS
/u-boot/arch/arm/include/asm/arch-omap5/
A Dmux_omap5.h116 #define UART1_RTS 0x00a6 macro
/u-boot/arch/arm/dts/
A Dstm32mp15xx-dhcom-drc02.dts143 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
A Dda850.dtsi141 /* UART1_CTS UART1_RTS */
/u-boot/board/logicpd/omap3som/
A Domap3logic.h142 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); /*UART1_RTS*/ in set_muxconf_regs()
/u-boot/drivers/pinctrl/
A Dpinctrl-kendryte.c376 FUNC(UART1_RTS, OUT),
/u-boot/board/ti/am3517crane/
A Dam3517crane.h203 MUX_VAL(CP(UART1_RTS), (M7))\
/u-boot/board/lg/sniper/
A Dsniper.h191 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /* uart1_rts */ \
/u-boot/board/logicpd/am3517evm/
A Dam3517evm.h231 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) \
/u-boot/board/corscience/tricorder/
A Dtricorder.h204 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \
/u-boot/board/technexion/tao3530/
A Dtao3530.h209 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) \
/u-boot/board/ti/evm/
A Devm.h227 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
/u-boot/board/timll/devkit8000/
A Ddevkit8000.h207 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \
/u-boot/board/ti/beagle/
A Dbeagle.h215 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \

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