Searched refs:UART1_RTS (Results 1 – 14 of 14) sorted by relevance
/u-boot/doc/device-tree-bindings/pinctrl/ |
A D | marvell,armada-cp110-pinctrl.txt | 79 5 MSS_UART_TXD UART1_RTS PCIe1_CLKREQ 117 43 MSS_UART_RXD SPI0_CSn[0] UART1_RTS 120 46 - - UART1_RTS
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/u-boot/arch/arm/include/asm/arch-omap5/ |
A D | mux_omap5.h | 116 #define UART1_RTS 0x00a6 macro
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/u-boot/arch/arm/dts/ |
A D | stm32mp15xx-dhcom-drc02.dts | 143 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
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A D | da850.dtsi | 141 /* UART1_CTS UART1_RTS */
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/u-boot/board/logicpd/omap3som/ |
A D | omap3logic.h | 142 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); /*UART1_RTS*/ in set_muxconf_regs()
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/u-boot/drivers/pinctrl/ |
A D | pinctrl-kendryte.c | 376 FUNC(UART1_RTS, OUT),
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/u-boot/board/ti/am3517crane/ |
A D | am3517crane.h | 203 MUX_VAL(CP(UART1_RTS), (M7))\
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/u-boot/board/lg/sniper/ |
A D | sniper.h | 191 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /* uart1_rts */ \
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/u-boot/board/logicpd/am3517evm/ |
A D | am3517evm.h | 231 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) \
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/u-boot/board/corscience/tricorder/ |
A D | tricorder.h | 204 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \
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/u-boot/board/technexion/tao3530/ |
A D | tao3530.h | 209 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) \
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/u-boot/board/ti/evm/ |
A D | evm.h | 227 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
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/u-boot/board/timll/devkit8000/ |
A D | devkit8000.h | 207 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \
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/u-boot/board/ti/beagle/ |
A D | beagle.h | 215 MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \
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