Home
last modified time | relevance | path

Searched refs:Write (Results 1 – 25 of 100) sorted by relevance

1234

/u-boot/arch/arm/cpu/armv7/sunxi/
A Dfel_utils.S33 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register
35 mcr p15, 0, r1, c12, c0, 0 @ Write VBAR
37 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register
39 msr cpsr, r1 @ Write CPSR
/u-boot/doc/
A DREADME.fsl-ddr168 + Slot 1 | Slot 2 |Write/Read| Write | Read |-------+------+-------+------+-------+------+-----…
169 | | | | | | Write | Read | Write | Read | Write | Read | Write | Read |
199 |Configuration| Write/Read |-------+-------+-------+------+-------+------+-------+------+-------+--…
200 | | | Write | Read | Write | Read | Write | Read | Write | Read | Write | Read |
228 + Slot 1 | Slot 2 |Write/Read| Write | Read |-------+------+-------+------+-------+------+--…
229 … | | | | | Write | Read | Write | Read | Write | Read | Wr…
259 |Configuration| Write/Read |-------+-------+-------+------+-------+------+
260 | | | Write | Read | Write | Read | Write | Read |
A DREADME.bitbangMII20 MDIO(v) - Write v on the MDIO pin
22 MDC(v) - Write v on the MDC pin
39 int (*set_mdio)() - Write the MDIO pin
41 int (*set_mdc)() - Write the MDC pin
A DREADME.pblimage35 Write u-boot.pbl to eSPI flash from offset 0x0.
44 Write u-boot.pbl to SD/MMC from offset 0x1000.
52 Write u-boot.pbl to Nand from offset 0x0.
A DREADME.rockusb51 - wl : Write blocks using LBA
52 - wlx: Write partition
A DREADME.ubi16 ubi write[vol] address volume size - Write volume from address with size
18 - Write part of a volume from address
81 ubi write Write data from memory to UBI volume
82 ubi write.part Write data from memory to UBI volume, in parts
/u-boot/doc/board/freescale/
A Dmx6sabreauto.rst35 Write in mx6sabreauto_defconfig the following define below:
84 - Write kernel at 2MB offset::
96 - Write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)::
A Dmx6sabresd.rst116 - Write kernel at 2MB offset::
128 - Write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)::
/u-boot/arch/nds32/cpu/n1213/ag101/
A Dwatchdog.S24 sw $p1, [$p0] ! Write back to WD CR
/u-boot/lib/lzma/
A DTypes.h116 void (*Write)(void *p, Byte b); member
133 size_t (*Write)(void *p, const void *buf, size_t size); member
/u-boot/board/freescale/mx51evk/
A Dimximage.cfg100 /* Write to CTL0 */
102 /* Write to CTL1 */
/u-boot/board/softing/vining_2000/
A Dimximage.cfg84 /* Write leveling */
92 /* Read/Write Delay */
/u-boot/board/freescale/mx6sxsabreauto/
A Dimximage.cfg83 /* Write leveling */
91 /* Read/Write Delay */
/u-boot/board/freescale/mx6sxsabresd/
A Dimximage.cfg90 /* Write leveling */
98 /* Read/Write Delay */
/u-boot/doc/device-tree-bindings/ram/
A Dfsl,mpc83xx-mem-controller.txt57 - write_to_read: Write-to-read turnaround; possible values:
61 - write_to_write: Write-to-write turnaround; possible values:
128 - write_latency: Write latency; possible values:
132 - write_cmd_to_write_data: Write command to write data strobe timing
/u-boot/board/bticino/mamoj/
A DREADME108 - Write uImage
113 - Write dtb and args
/u-boot/arch/powerpc/cpu/mpc83xx/bats/
A DKconfig69 bool "I-cache Write-through"
81 bool "D-cache Write-through"
232 bool "I-cache Write-through"
244 bool "D-cache Write-through"
395 bool "I-cache Write-through"
407 bool "D-cache Write-through"
558 bool "I-cache Write-through"
570 bool "D-cache Write-through"
723 bool "I-cache Write-through"
735 bool "D-cache Write-through"
[all …]
/u-boot/board/d-link/dns325/
A Dkwbimage.cfg98 # bit11-9: 0, Write recovery for auto-precharge (3 required ??)
134 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing
144 # bit1: 0, Write Protect disabled
152 # bit1: 0, Write Protect disabled
/u-boot/arch/x86/include/asm/acpi/cros_ec/
A Dkeyboard_backlight.asl46 /* Write new backlight value */
A Demem.asl28 WPDI, 1, // Write Protect Disabled
/u-boot/board/advantech/dms-ba16/
A Dmicron-1g.cfg17 /* Write calibration */
A Dsamsung-2g.cfg17 /* Write calibration */
/u-boot/board/buffalo/lsxl/
A Dkwbimage-lschl.cfg106 # bit11-9: 3, Write recovery for auto-precharge (3 required)
145 # DDR2 ODT Write Timing (default values)
160 # bit1: 0, Write Protect disabled
A Dkwbimage-lsxhl.cfg106 # bit11-9: 3, Write recovery for auto-precharge (3 required)
145 # DDR2 ODT Write Timing (default values)
160 # bit1: 0, Write Protect disabled
/u-boot/doc/board/xen/
A Dxenguest_arm64.rst46 Write-Back Outer Write-Back Inner-Shareable.

Completed in 38 milliseconds

1234