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Searched refs:XCHAL_DCACHE_LINESIZE (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/xtensa/include/asm/
A Dcache.h10 #define ARCH_DMA_MINALIGN XCHAL_DCACHE_LINESIZE
/u-boot/arch/xtensa/include/asm/arch-dc232b/
A Dcore.h120 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
/u-boot/arch/xtensa/include/asm/arch-dc233c/
A Dcore.h139 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
/u-boot/arch/xtensa/include/asm/arch-de212/
A Dcore.h187 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro

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