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Searched refs:XCHAL_DCACHE_SETWIDTH (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/xtensa/include/asm/
A Dcacheasm.h17 #define DCACHE_WAY_SHIFT (XCHAL_DCACHE_SETWIDTH + XCHAL_DCACHE_LINEWIDTH)
/u-boot/arch/xtensa/include/asm/arch-dc232b/
A Dcore.h149 #define XCHAL_DCACHE_SETWIDTH 7 macro
/u-boot/arch/xtensa/include/asm/arch-dc233c/
A Dcore.h171 #define XCHAL_DCACHE_SETWIDTH 7 macro
/u-boot/arch/xtensa/include/asm/arch-de212/
A Dcore.h228 #define XCHAL_DCACHE_SETWIDTH 7 macro

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