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Searched refs:XCHAL_ICACHE_LINESIZE (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/xtensa/include/asm/arch-dc232b/
A Dcore.h119 #define XCHAL_ICACHE_LINESIZE 32 /* I-cache line size in bytes */ macro
/u-boot/arch/xtensa/include/asm/arch-dc233c/
A Dcore.h138 #define XCHAL_ICACHE_LINESIZE 32 /* I-cache line size in bytes */ macro
/u-boot/arch/xtensa/include/asm/arch-de212/
A Dcore.h186 #define XCHAL_ICACHE_LINESIZE 32 /* I-cache line size in bytes */ macro

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