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Searched refs:XCHAL_TIMER0_INTERRUPT (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/xtensa/include/asm/arch-dc232b/
A Dcore.h274 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/u-boot/arch/xtensa/include/asm/arch-dc233c/
A Dcore.h302 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/u-boot/arch/xtensa/include/asm/arch-de212/
A Dcore.h388 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro

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