Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL1 (Results 1 – 1 of 1) sorted by relevance
| /u-boot/arch/arm/mach-tegra/tegra210/ |
| A D | xusb-padctl.c | 187 #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 macro
247 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
249 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
266 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
270 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
272 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
274 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
276 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
278 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
324 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
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