Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN (Results 1 – 1 of 1) sorted by relevance
203 #define XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN (1 << 0) macro287 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN; in pcie_phy_enable()306 value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN; in pcie_phy_enable()
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