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Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL4 (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-tegra/tegra210/
A Dxusb-padctl.c205 #define XUSB_PADCTL_UPHY_PLL_P0_CTL4 0x36c macro
259 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
264 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
282 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
284 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()

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