XUSB_PADCTL_UPHY_PLL_P0_CTL5 (reference) in projects: u-boot

Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL5 (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-tegra/tegra210/
A D	xusb-padctl.c	`212 #define XUSB_PADCTL_UPHY_PLL_P0_CTL5 0x370 macro 242 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable() 245 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable()`

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