XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL (reference) in projects: u-boot

Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-tegra/tegra210/
A D	xusb-padctl.c	`214 #define XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL(x) (((x) & 0xff) << 16) macro 244 value \|= XUSB_PADCTL_UPHY_PLL_P0_CTL5_DCO_CTRL(0x2a); in pcie_phy_enable()`

Completed in 4 milliseconds