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Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8 (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-tegra/tegra210/
A Dxusb-padctl.c216 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8 0x37c macro
255 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
257 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
342 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
345 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
351 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
361 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
363 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
369 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
379 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
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