Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN (Results 1 – 1 of 1) sorted by relevance
220 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN (1 << 12) macro344 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN; in pcie_phy_enable()362 value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN; in pcie_phy_enable()
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