Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD (Results 1 – 1 of 1) sorted by relevance
218 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD (1 << 15) macro256 value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; in pcie_phy_enable()
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