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Searched refs:__REG (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/cpu/arm1136/mx31/
A Dtimer.c15 #define GPTCR __REG(TIMER_BASE) /* Control register */
16 #define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
17 #define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
18 #define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
A Ddevices.c48 __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4); in mx31_spi2_hw_init()
/u-boot/drivers/video/
A Dmx3fb.c723 __REG(CCM_CGR1) = __REG(CCM_CGR1) | (3 << 22); in ll_disp3_enable()
/u-boot/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h272 #define __REG(x) (*((volatile u32 *)(x))) macro
/u-boot/doc/
A DREADME.arm-relocation161 192 while (__REG(UART_PHYS + UTS) & UTS_RXEMPTY);
/u-boot/arch/arm/include/asm/arch-mx31/
A Dimx-regs.h523 #define __REG(x) (*((volatile u32 *)(x))) macro

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