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Searched refs:_s (Results 1 – 7 of 7) sorted by relevance

/u-boot/include/xen/interface/io/
A Dring.h45 #define __CONST_RING_SIZE(_s, _sz) \ argument
46 (__RD32(((_sz) - offsetof(struct _s##_sring, ring)) / \
47 sizeof(((struct _s##_sring *)0)->ring[0])))
51 #define __RING_SIZE(_s, _sz) \ argument
52 (__RD32(((_sz) - (long)(_s)->ring + (long)(_s)) / sizeof((_s)->ring[0])))
149 (_s)->req_prod = (_s)->rsp_prod = 0; \
150 (_s)->req_event = (_s)->rsp_event = 1; \
151 (void)memset((_s)->pvt.pvt_pad, 0, sizeof((_s)->pvt.pvt_pad)); \
152 (void)memset((_s)->__pad, 0, sizeof((_s)->__pad)); \
158 (_r)->nr_ents = __RING_SIZE(_s, __size); \
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/u-boot/drivers/clk/imx/
A Dclk-imx8mm.c18 #define PLL_1416X_RATE(_rate, _m, _p, _s) \ argument
23 .sdiv = (_s), \
26 #define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ argument
31 .sdiv = (_s), \
A Dclk-imx8mn.c18 #define PLL_1416X_RATE(_rate, _m, _p, _s) \ argument
23 .sdiv = (_s), \
26 #define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ argument
31 .sdiv = (_s), \
A Dclk-imx8mp.c18 #define PLL_1416X_RATE(_rate, _m, _p, _s) \ argument
23 .sdiv = (_s), \
26 #define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ argument
31 .sdiv = (_s), \
/u-boot/drivers/clk/mvebu/
A Darmada-37xx-periph.c126 #define CLK_FULL(_n, _d, _mux, _r, _s, _m, _t) \ argument
133 .div_shift[0] = _s, \
140 #define CLK_GATE_DIV(_n, _d, _r, _s, _m, _t, _p) \ argument
147 .div_shift[0] = _s, \
161 #define CLK_MUX_DIV(_n, _mux, _r, _s, _m, _t) \ argument
167 .div_shift[0] = _s, \
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock.h190 #define DRAM_BYPASS_ROOT_CONFIG(_rate, _m, _p, _s, _k) \ argument
195 .apb_root_sel = (_s), \
A Dclock_imx8mm.h15 #define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ argument
20 .sdiv = (_s), \

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