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/u-boot/lib/zlib/
A Dadler32.c25 if (a >= (BASE << 16)) a -= (BASE << 16); \
26 if (a >= (BASE << 15)) a -= (BASE << 15); \
32 if (a >= (BASE << 9)) a -= (BASE << 9); \
33 if (a >= (BASE << 8)) a -= (BASE << 8); \
34 if (a >= (BASE << 7)) a -= (BASE << 7); \
35 if (a >= (BASE << 6)) a -= (BASE << 6); \
36 if (a >= (BASE << 5)) a -= (BASE << 5); \
41 if (a >= BASE) a -= BASE; \
49 if (a >= BASE) a -= BASE; \
52 # define MOD(a) a %= BASE argument
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/u-boot/drivers/usb/cdns3/
A Dtrace.h3 #define trace_cdns3_prepare_trb(a, b) argument
4 #define trace_cdns3_doorbell_ep0(a, b) argument
5 #define trace_cdns3_ctrl_req(a) argument
7 #define trace_cdns3_ep0_irq(a, b) argument
11 #define trace_cdns3_ring(a) argument
14 #define trace_cdns3_epx_irq(a, b) argument
15 #define trace_cdns3_usb_irq(a, b) argument
22 #define trace_cdns3_ep_queue(a) argument
23 #define trace_cdns3_ep_dequeue(a) argument
25 #define trace_cdns3_wa1(a, b) argument
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/u-boot/arch/mips/include/asm/
A Daddrspace.h51 #define XPHYSADDR(a) ((_ACAST64_(a)) & \ argument
70 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) argument
71 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) argument
77 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) argument
78 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) argument
79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) argument
80 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) argument
85 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) argument
86 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) argument
87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) argument
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/u-boot/drivers/net/
A Dsmc91111.h72 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1)))) argument
73 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1)))) argument
81 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) argument
82 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r)))) argument
96 #define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d) argument
219 #define SMC_inw(a, r) *((volatile word*)((a)->iobase + (r))) argument
259 #define SMC_inw(a, r) (*((volatile word*)((a)->iobase+(r)))) argument
261 #define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF)) argument
279 #define SMC_outsw(a,r,b,l) outsw((a)->iobase+(r), (b), (l))
291 #define SMC_insw(a,r,b,l) insw((a)->iobase+(r), (b), (l))
[all …]
/u-boot/fs/yaffs2/
A Dyaffs_qsort.c25 #define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \ argument
46 #define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n, swaptype) argument
52 (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a)) in med3()
53 : (cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c)); in med3()
57 #define min(a, b) (((a) < (b)) ? (a) : (b)) argument
68 loop: SWAPINIT(a, es); in yaffs_qsort()
71 for (pm = (char *)a + es; pm < (char *) a + n * es; pm += es) in yaffs_qsort()
79 pl = (char *)a; in yaffs_qsort()
89 yswap(a, pm); in yaffs_qsort()
118 for (pm = (char *) a + es; pm < (char *) a + n * es; pm += es) in yaffs_qsort()
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A Dydirectenv.h37 #define yaffs_strcat(a, b) strcat(a, b) argument
38 #define yaffs_strcpy(a, b) strcpy(a, b) argument
39 #define yaffs_strncpy(a, b, c) strncpy(a, b, c) argument
42 #define yaffs_strcmp(a, b) strcasecmp(a, b) argument
43 #define yaffs_strncmp(a, b, c) strncasecmp(a, b, c) argument
45 #define yaffs_strcmp(a, b) strcmp(a, b) argument
46 #define yaffs_strncmp(a, b, c) strncmp(a, b, c) argument
/u-boot/arch/arm/include/asm/arch-octeontx2/csrs/
A Dcsrs-cgx.h26 #define CGX_BAR_E_CGXX_PF_BAR0(a) (0x87e0e0000000ll + 0x1000000ll * (a)) argument
36 #define CGX_INT_VEC_E_CMRX_INT(a) (0 + 9 * (a)) argument
37 #define CGX_INT_VEC_E_CMRX_SW(a) (0x26 + (a)) argument
39 #define CGX_INT_VEC_E_GMPX_GMI_RX_INT(a) (5 + 9 * (a)) argument
40 #define CGX_INT_VEC_E_GMPX_GMI_TX_INT(a) (6 + 9 * (a)) argument
41 #define CGX_INT_VEC_E_GMPX_GMI_WOL_INT(a) (7 + 9 * (a)) argument
42 #define CGX_INT_VEC_E_GMPX_PCS_INT(a) (4 + 9 * (a)) argument
43 #define CGX_INT_VEC_E_SMUX_RX_INT(a) (2 + 9 * (a)) argument
44 #define CGX_INT_VEC_E_SMUX_RX_WOL_INT(a) (8 + 9 * (a)) argument
45 #define CGX_INT_VEC_E_SMUX_TX_INT(a) (3 + 9 * (a)) argument
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A Dcsrs-rvu.h58 #define RVU_BLOCK_ADDR_E_CPTX(a) (0xa + (a)) argument
60 #define RVU_BLOCK_ADDR_E_NDCX(a) (0xc + (a)) argument
61 #define RVU_BLOCK_ADDR_E_NIXX(a) (4 + (a)) argument
64 #define RVU_BLOCK_ADDR_E_RX(a) (0 + (a)) argument
65 #define RVU_BLOCK_ADDR_E_REEX(a) (0x14 + (a)) argument
98 #define RVU_BUS_LF_E_RVU_BUS_LFX(a) (0 + 0x2000000 * (a)) argument
125 #define RVU_BUS_PFVF_E_RVU_BUS_PFX(a) (0 + 0x2000000 * (a)) argument
126 #define RVU_BUS_PFVF_E_RVU_BUS_VFX(a) (0 + 0x2000000 * (a)) argument
153 #define RVU_PF_INT_VEC_E_VFFLRX(a) (0 + (a)) argument
154 #define RVU_PF_INT_VEC_E_VFMEX(a) (2 + (a)) argument
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A Dcsrs-npc.h35 #define NPC_ERRLEV_E_RX(a) (0 + (a)) argument
43 #define NPC_INTF_E_NIXX_RX(a) (0 + 2 * (a)) argument
44 #define NPC_INTF_E_NIXX_TX(a) (1 + 2 * (a)) argument
379 return 0x200000 + 8 * a; in NPC_AF_CPIX_CFG()
426 return 0x3001400 + 0x10 * a; in NPC_AF_DBG_DATAX()
564 return 0x1010 + 0x100 * a; in NPC_AF_INTFX_KEX_CFG()
673 return 0x1880040 + 8 * a; in NPC_AF_INTFX_MISS_STAT_ACT()
765 return 0x800 + 8 * a; in NPC_AF_KEX_LDATAX_FLAGS_CFG()
786 return 0x500 + 8 * a; in NPC_AF_KPUX_CFG()
1549 return 0x80000 + 0x40 * a; in NPC_AF_PKINDX_ACTION0()
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/u-boot/arch/arc/lib/
A Dlibgcc2.h61 #define __NW(a,b) __gnu_ ## a ## di ## b argument
62 #define __NDW(a,b) __gnu_ ## a ## ti ## b argument
64 #define __NW(a,b) __ ## a ## di ## b argument
65 #define __NDW(a,b) __ ## a ## ti ## b argument
76 #define __NW(a,b) __gnu_ ## a ## si ## b argument
79 #define __NW(a,b) __ ## a ## si ## b argument
80 #define __NDW(a,b) __ ## a ## di ## b argument
94 #define __NW(a,b) __ ## a ## hi ## b argument
95 #define __NDW(a,b) __ ## a ## si ## b argument
109 #define __NW(a,b) __ ## a ## qi ## b argument
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/u-boot/include/
A Dtime.h60 #define time_after(a,b) \ argument
63 ((long)((b) - (a)) < 0))
64 #define time_before(a,b) time_after(b,a) argument
66 #define time_after_eq(a,b) \ argument
69 ((long)((a) - (b)) >= 0))
70 #define time_before_eq(a,b) time_after_eq(b,a) argument
75 #define time_in_range(a,b,c) \ argument
76 (time_after_eq(a,b) && \
77 time_before_eq(a,c))
83 (time_after_eq(a,b) && \
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A Dfsl_sfp.h14 #define srk_in32(a) in_le32(a) argument
16 #define srk_in32(a) in_be32(a) argument
20 #define sfp_in32(a) in_le32(a) argument
21 #define sfp_out32(a, v) out_le32(a, v) argument
22 #define sfp_in16(a) in_le16(a) argument
24 #define sfp_in32(a) in_be32(a) argument
25 #define sfp_out32(a, v) out_be32(a, v) argument
26 #define sfp_in16(a) in_be16(a) argument
A Dfsl_sec_mon.h15 #define sec_mon_in32(a) in_le32(a) argument
16 #define sec_mon_out32(a, v) out_le32(a, v) argument
17 #define sec_mon_in16(a) in_le16(a) argument
21 #define sec_mon_in32(a) in_be32(a) argument
22 #define sec_mon_out32(a, v) out_be32(a, v) argument
23 #define sec_mon_in16(a) in_be16(a) argument
/u-boot/arch/arm/include/asm/
A Dio.h103 #define __raw_readb(a) __arch_getb(a) argument
104 #define __raw_readw(a) __arch_getw(a) argument
105 #define __raw_readl(a) __arch_getl(a) argument
106 #define __raw_readq(a) __arch_getq(a) argument
179 #define in_le64(a) in_arch(q,le64,a) argument
180 #define in_le32(a) in_arch(l,le32,a) argument
181 #define in_le16(a) in_arch(w,le16,a) argument
196 #define in_64(a) __raw_readq(a) argument
197 #define in_32(a) __raw_readl(a) argument
198 #define in_16(a) __raw_readw(a) argument
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/u-boot/arch/mips/include/asm/mach-generic/
A Dmangle-port.h27 # define ioswabb(a, x) (x) argument
28 # define __mem_ioswabb(a, x) (x) argument
29 # define ioswabw(a, x) le16_to_cpu(x) argument
30 # define __mem_ioswabw(a, x) (x) argument
32 # define __mem_ioswabl(a, x) (x) argument
34 # define __mem_ioswabq(a, x) (x) argument
38 # define ioswabb(a, x) (x) argument
39 # define __mem_ioswabb(a, x) (x) argument
40 # define ioswabw(a, x) (x) argument
42 # define ioswabl(a, x) (x) argument
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/u-boot/arch/arm/include/asm/arch-octeontx/csrs/
A Dcsrs-xcv.h26 #define XCV_BAR_E_XCVX_PF_BAR0(a) (0x87e0db000000ll + 0ll * (a)) argument
28 #define XCV_BAR_E_XCVX_PF_BAR4(a) (0x87e0dbf00000ll + 0ll * (a)) argument
56 return 0x100 + 0 * a; in XCVX_BATCH_CRD_RET()
92 return 0x20 + 0 * a; in XCVX_COMP_CTL()
115 return 0x30 + 0 * a; in XCVX_CTL()
168 return 0x10 + 0 * a; in XCVX_DLL_CTL()
212 return 0x80 + 0 * a; in XCVX_INBND_STATUS()
241 return 0x40 + 0 * a; in XCVX_INT()
269 return 0x50 + 0 * a; in XCVX_INT_ENA_W1C()
297 return 0x58 + 0 * a; in XCVX_INT_ENA_W1S()
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/u-boot/arch/sh/include/asm/
A Dbitops.h20 a += nr >> 5; in set_bit()
23 *a |= mask; in set_bit()
38 a += nr >> 5; in clear_bit()
41 *a &= ~mask; in clear_bit()
51 a += nr >> 5; in change_bit()
54 *a ^= mask; in change_bit()
64 a += nr >> 5; in test_and_set_bit()
68 *a |= mask; in test_and_set_bit()
80 a += nr >> 5; in test_and_clear_bit()
84 *a &= ~mask; in test_and_clear_bit()
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/u-boot/lib/
A Dmd5.c185 register __u32 a, b, c, d; in MD5Transform() local
187 a = buf[0]; in MD5Transform()
192 MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7); in MD5Transform()
196 MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7); in MD5Transform()
200 MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7); in MD5Transform()
209 MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5); in MD5Transform()
210 MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9); in MD5Transform()
213 MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5); in MD5Transform()
217 MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5); in MD5Transform()
222 MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9); in MD5Transform()
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/u-boot/arch/nios2/include/asm/
A Dio.h126 #define out_le32(a,v) out_arch(l,le32,a,v) argument
127 #define out_le16(a,v) out_arch(w,le16,a,v) argument
129 #define in_le32(a) in_arch(l,le32,a) argument
130 #define in_le16(a) in_arch(w,le16,a) argument
132 #define out_be32(a,v) out_arch(l,be32,a,v) argument
133 #define out_be16(a,v) out_arch(w,be16,a,v) argument
135 #define in_be32(a) in_arch(l,be32,a) argument
136 #define in_be16(a) in_arch(w,be16,a) argument
138 #define out_8(a,v) __raw_writeb(v,a) argument
139 #define in_8(a) __raw_readb(a) argument
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/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dsoc.h22 #define gur_in32(a) in_le32(a) argument
23 #define gur_out32(a, v) out_le32(a, v) argument
25 #define gur_in32(a) in_be32(a) argument
26 #define gur_out32(a, v) out_be32(a, v) argument
30 #define scfg_in32(a) in_le32(a) argument
31 #define scfg_out32(a, v) out_le32(a, v) argument
35 #define scfg_in32(a) in_be32(a) argument
36 #define scfg_out32(a, v) out_be32(a, v) argument
42 #define pex_lut_in32(a) in_le32(a) argument
43 #define pex_lut_out32(a, v) out_le32(a, v) argument
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/u-boot/arch/mips/mach-octeon/include/
A Dmangle-port.h13 static inline bool __should_swizzle_bits(volatile void *a) in __should_swizzle_bits() argument
16 u64 did = ((u64)(uintptr_t)a >> 40) & 0xff; in __should_swizzle_bits()
28 #define __should_swizzle_bits(a) false argument
47 # define ioswabb(a, x) (x) argument
48 # define __mem_ioswabb(a, x) (x) argument
49 # define ioswabw(a, x) (__should_swizzle_bits(a) ? le16_to_cpu(x) : x) argument
50 # define __mem_ioswabw(a, x) (x) argument
51 # define ioswabl(a, x) (__should_swizzle_bits(a) ? le32_to_cpu(x) : x) argument
52 # define __mem_ioswabl(a, x) (x) argument
53 # define ioswabq(a, x) (__should_swizzle_bits(a) ? le64_to_cpu(x) : x) argument
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/u-boot/arch/riscv/include/asm/
A Dio.h57 #define __raw_writeb(v, a) __arch_putb(v, a) argument
62 #define __raw_readb(a) __arch_getb(a) argument
63 #define __raw_readw(a) __arch_getw(a) argument
64 #define __raw_readl(a) __arch_getl(a) argument
65 #define __raw_readq(a) __arch_getq(a) argument
150 #define in_le32(a) in_arch(l, le32, a) argument
151 #define in_le16(a) in_arch(w, le16, a) argument
156 #define in_be32(a) in_arch(l, be32, a) argument
157 #define in_be16(a) in_arch(w, be16, a) argument
159 #define out_8(a, v) __raw_writeb(v, a) argument
[all …]
A Dbitops.h37 int *a = (int *)addr; in __set_bit() local
40 a += nr >> 5; in __set_bit()
42 *a |= mask; in __set_bit()
52 a += nr >> 5; in __clear_bit()
54 *a &= ~mask; in __clear_bit()
74 a += nr >> 5; in __test_and_set_bit()
77 *a |= mask; in __test_and_set_bit()
86 a += nr >> 5; in __test_and_clear_bit()
89 *a &= ~mask; in __test_and_clear_bit()
98 a += nr >> 5; in __test_and_change_bit()
[all …]
/u-boot/post/lib_powerpc/fpu/
A Ddarwin-ldouble.c41 #define nonfinite(a) unlikely(!isless(fabs(a), inf())) argument
54 z = a + c; in __gcc_qadd()
57 z = cc + aa + c + a; in __gcc_qadd()
62 if (fabs(a) > fabs(c)) in __gcc_qadd()
63 x.dval[1] = a - z + c + zz; in __gcc_qadd()
65 x.dval[1] = c - z + a + zz; in __gcc_qadd()
67 q = a - z; in __gcc_qadd()
68 zz = q + c + (a - (q + z)) + aa + cc; in __gcc_qadd()
86 return __gcc_qadd(a, b, -c, -d); in __gcc_qsub()
106 tau = fmsub(a, c, t); in __gcc_qmul()
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/u-boot/arch/microblaze/include/asm/
A Dbitops.h42 a += nr >> 5; in set_bit()
45 *a |= mask; in set_bit()
54 a += nr >> 5; in __set_bit()
56 *a |= mask; in __set_bit()
72 a += nr >> 5; in clear_bit()
75 *a &= ~mask; in clear_bit()
115 *a |= mask; in test_and_set_bit()
129 *a |= mask; in __test_and_set_bit()
143 *a &= ~mask; in test_and_clear_bit()
171 *a ^= mask; in test_and_change_bit()
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