| /u-boot/board/freescale/m54418twr/ |
| A D | sbf_dram_init.S | 12 move.l #0xFC04002D, %a1
16 move.l #0xEC094060, %a1
17 move.b #0, (%a1)
20 move.l #0xEC09001A, %a1
21 move.w #0xE01D, (%a1)
24 move.l #0xFC0B8180, %a1
25 move.l #0x00000000, (%a1)
26 move.l #0x40000000, (%a1)
28 move.l #0xFC0B81AC, %a1
31 move.l #0xFC0B8000, %a1
[all …]
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| /u-boot/board/sysam/stmark2/ |
| A D | sbf_dram_init.S | 25 move.l #PPMCR0, %a1
26 move.b #46, (%a1)
29 move.l #MSCR_SDRAMC, %a1
30 move.b #1, (%a1)
48 move.l #MISCCR2, %a1
49 move.w #0xa01d, (%a1)
52 move.l #DDR_RCR, %a1
60 move.l #DDR_PADCR, %a1
63 move.l #DDR_CR00, %a1
69 move.l #DDR_CR06, %a1
[all …]
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| /u-boot/arch/m68k/cpu/mcf5445x/ |
| A D | start.S | 492 jsr (%a1)
501 jsr (%a1)
505 jsr (%a1)
510 jsr (%a1)
542 cmp.l %a1,%a2
549 move.l %a0, %a1
551 jmp (%a1)
564 clr.l (%a1)+
565 cmp.l %a1,%d1
583 cmp.l %a2, %a1
[all …]
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| /u-boot/arch/m68k/cpu/mcf523x/ |
| A D | start.S | 128 jsr (%a1)
137 jsr (%a1)
141 jsr (%a1)
146 jsr (%a1)
178 cmp.l %a1,%a2
185 move.l %a0, %a1
187 jmp (%a1)
200 clr.l (%a1)+
201 cmp.l %a1,%d1
219 cmp.l %a2, %a1
[all …]
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| /u-boot/arch/m68k/cpu/mcf5227x/ |
| A D | start.S | 149 or.l %d1, (%a1)
382 jsr (%a1)
414 cmp.l %a1,%a2
421 move.l %a0, %a1
423 jmp (%a1)
431 move.l %a0, %a1
436 clr.l (%a1)+
437 cmp.l %a1,%d1
443 move.l %a0, %a1
455 cmp.l %a2, %a1
[all …]
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| /u-boot/arch/xtensa/cpu/ |
| A D | start.S | 292 mov a1, a2
382 addi a1, a1, -16 - 4 # create a small stack frame
397 mov a1, a2
424 s32i a2, a1, PT_SAR
425 s32i a3, a1, PT_PC
432 s32i a3, a1, PT_LBEG
435 s32i a3, a1, PT_LEND
452 s32i a3, a1, PT_PS
460 l32i a3, a1, PT_PS
481 l32i a2, a1, PT_SAR
[all …]
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| /u-boot/board/freescale/m54455evb/ |
| A D | sbf_dram_init.S | 16 move.l #0xFC0A4074, %a1
17 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
21 move.l #0xFC0B8110, %a1
40 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
41 or.l %d1, (%a1)
49 move.l #0xFC0B8008, %a1
50 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
56 move.l #0xFC0B8000, %a1 /* Mode */
64 move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
66 move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
[all …]
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| /u-boot/arch/m68k/cpu/mcf532x/ |
| A D | start.S | 143 jsr (%a1)
152 jsr (%a1)
156 jsr (%a1)
161 jsr (%a1)
193 cmp.l %a1,%a2
200 move.l %a0, %a1
202 jmp (%a1)
215 clr.l (%a1)+
216 cmp.l %a1,%d1
234 cmp.l %a2, %a1
[all …]
|
| /u-boot/board/freescale/m54451evb/ |
| A D | sbf_dram_init.S | 16 move.l #0xFC0A4074, %a1
17 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
21 move.l #0xFC0B8110, %a1
40 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
41 or.l %d1, (%a1)
49 move.l #0xFC0B8008, %a1
50 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
56 move.l #0xFC0B8000, %a1 /* Mode */
78 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
80 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
|
| /u-boot/arch/m68k/cpu/mcf52x2/ |
| A D | start.S | 144 cmp.l %a0, %a1
207 jsr (%a1)
216 jsr (%a1)
220 jsr (%a1)
225 jsr (%a1)
256 cmp.l %a1,%a2
265 jmp (%a1)
278 clr.l (%a1)+
279 cmp.l %a1,%d1
297 cmp.l %a2, %a1
[all …]
|
| /u-boot/arch/arm/lib/ |
| A D | setjmp.S | 18 stm a1, {v1-v8, ip, lr}
19 mov a1, #0
26 ldm a1, {v1-v8, ip, lr}
28 mov a1, a2
30 cmp a1, #0
32 mov a1, #1
|
| /u-boot/arch/m68k/cpu/mcf547x_8x/ |
| A D | start.S | 135 jsr (%a1)
144 jsr (%a1)
183 cmp.l %a1,%a2
190 move.l %a0, %a1
192 jmp (%a1)
200 move.l %a0, %a1
205 clr.l (%a1)+
206 cmp.l %a1,%d1
212 move.l %a0, %a1
224 cmp.l %a2, %a1
[all …]
|
| /u-boot/arch/mips/mach-ath79/qca956x/ |
| A D | qca956x-ddr-tap.S | 23 sw a1, 0x10(a0) /* Place where the First pass tap value is stored */
27 lw a1, 0x1c(a0) /* Reading the RST_RESET_ADDRESS */
29 or a1, a1, a2
30 sw a1, 0x1c(a0)
34 and a1, a1, a2
35 sw a1, 0x1c(a0) /* Taking the RTC out of RESET */
39 li a1, 0x1
40 sw a1, 0x0040(a0) /* RTC_SYNC_RESET_ADDRESS */
45 lw a1, 0x0044(a0) /* RTC_SYNC_STATUS_ADDRESS */
46 and a1, a2, a1
[all …]
|
| /u-boot/arch/m68k/cpu/mcf530x/ |
| A D | start.S | 177 cmp.l %a1,%a2
184 move.l %a0, %a1
186 jmp (%a1)
194 move.l %a0, %a1
199 clr.l (%a1)+
200 cmp.l %a1,%d1
206 move.l %a0, %a1
210 move.l %a1,%a5
220 cmp.l %a2, %a1
224 move.l %a0, %a1
[all …]
|
| /u-boot/arch/mips/mach-mtmips/mt7628/ |
| A D | lowlevel_init.S | 75 li a1, CONFIG_SYS_ICACHE_SIZE
81 bne a0, a1, 1b
86 li a1, CONFIG_SYS_DCACHE_SIZE
92 bne a0, a1, 2b
104 li a1, CACHE_STACK_SIZE /* D-Cache lock size */
116 sub a1, CONFIG_SYS_DCACHE_LINE_SIZE
117 bnez a1, 3b
143 li a1, CACHE_STACK_SIZE /* D-Cache unlock size */
148 sub a1, CONFIG_SYS_DCACHE_LINE_SIZE
149 bnez a1, 1b
|
| /u-boot/cmd/ |
| A D | smccc.c | 20 unsigned long a1; in do_call() local
33 a1 = argc > 2 ? simple_strtoul(argv[2], NULL, 16) : 0; in do_call()
42 arm_smccc_smc(fid, a1, a2, a3, a4, a5, a6, a7, &res); in do_call()
44 arm_smccc_hvc(fid, a1, a2, a3, a4, a5, a6, a7, &res); in do_call()
46 printf("Res: %ld %ld %ld %ld\n", res.a0, res.a1, res.a2, res.a3); in do_call()
|
| /u-boot/fs/zfs/ |
| A D | zfs_fletcher.c | 40 uint64_t a0, b0, a1, b1; in fletcher_2_endian() local
42 for (a0 = b0 = a1 = b1 = 0; ip < ipend; ip += 2) { in fletcher_2_endian()
44 a1 += zfs_to_cpu64(ip[1], endian); in fletcher_2_endian()
46 b1 += a1; in fletcher_2_endian()
50 zcp->zc_word[1] = cpu_to_zfs64(a1, endian); in fletcher_2_endian()
|
| /u-boot/post/lib_powerpc/ |
| A D | complex.c | 23 extern int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n);
33 int a1 = 666; in cpu_post_test_complex_1() local
40 if (cpu_post_complex_1_asm(a1, a2, a3, a4, n) != n * result) in cpu_post_test_complex_1()
|
| /u-boot/board/advantech/imx8qm_rom7720_a1/ |
| A D | MAINTAINERS | 1 i.MX8QM ROM 7720 a1 BOARD
5 F: arch/arm/dts/imx8qm-rom7720-a1.dts
|
| /u-boot/include/linux/ |
| A D | arm-smccc.h | 64 unsigned long a1; member
94 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
111 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
|
| /u-boot/drivers/tee/optee/ |
| A D | core.c | 34 u32 a1; member
258 param->a1, TEE_SHM_ALLOC | TEE_SHM_REGISTER, in handle_rpc()
260 reg_pair_from_64(¶m->a1, ¶m->a2, in handle_rpc()
265 param->a1 = 0; in handle_rpc()
272 shm = reg_pair_to_ptr(param->a1, param->a2); in handle_rpc()
278 shm = reg_pair_to_ptr(param->a1, param->a2); in handle_rpc()
304 reg_pair_from_64(¶m.a1, ¶m.a2, virt_to_phys(arg)); in do_call_with_arg()
308 pdata->invoke_fn(param.a0, param.a1, param.a2, param.a3, in do_call_with_arg()
316 param.a1 = res.a1; in do_call_with_arg()
578 arm_smccc_smc(a0, a1, a2, a3, a4, a5, a6, a7, res); in optee_smccc_smc()
[all …]
|
| /u-boot/arch/riscv/cpu/ |
| A D | start.S | 51 mv s1, a1
228 mv a1, s0
235 mv a1, a0
246 mv a1, zero
260 mv s3, a1 /* save addr of gd */
370 mv a1, s2
377 mv a1, a0
399 mv a1, s4 /* dest_addr */
420 sub sp, a1, t0
|
| /u-boot/arch/riscv/lib/ |
| A D | crt0_riscv_efi.S | 161 SAVE_LONG(a1, 1)
165 lla a1, _DYNAMIC
169 LOAD_LONG(a1, 1)
|
| A D | sbi.c | 22 register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); in sbi_ecall()
30 : "+r" (a0), "+r" (a1) in sbi_ecall()
34 ret.value = a1; in sbi_ecall()
|
| /u-boot/arch/mips/include/asm/ |
| A D | regdef.h | 24 #define a1 $5 macro
67 #define a1 $5 macro
|