Searched refs:ahb_reset1_cfg (Results 1 – 8 of 8) sorted by relevance
| /u-boot/drivers/video/sunxi/ |
| A D | sunxi_dw_hdmi.c | 268 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0); in sunxi_dw_hdmi_lcdc_init()
278 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD1); in sunxi_dw_hdmi_lcdc_init()
357 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); in sunxi_dw_hdmi_probe()
358 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI2); in sunxi_dw_hdmi_probe()
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| A D | sunxi_lcd.c | 51 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0); in sunxi_lcd_enable()
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| A D | sunxi_display.c | 110 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); in sunxi_hdmi_hpd_detect()
146 clrbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); in sunxi_hdmi_shutdown()
452 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DE_BE0); in sunxi_composer_init()
534 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0); in sunxi_lcdc_init()
838 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_SAT);
840 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0);
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| A D | sunxi_de2.c | 57 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DE); in sunxi_de2_composer_init()
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | clock_sun9i.c | 61 setbits_le32(&ccm->ahb_reset1_cfg, (1 << 24)); in clock_init_safe()
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| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| A D | clock_sun9i.h | 95 u32 ahb_reset1_cfg; /* 0x5a4 AHB1 Software Reset Register */ member
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| A D | clock_sun8i_a83t.h | 121 u32 ahb_reset1_cfg; /* 0x2c4 AHB1 Reset 1 config */ member
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| A D | clock_sun6i.h | 159 u32 ahb_reset1_cfg; /* 0x2c4 AHB1 Reset 1 config */ member
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