Searched refs:apb0 (Results 1 – 6 of 6) sorted by relevance
| /u-boot/arch/arm/mach-sunxi/ |
| A D | clock_sun4i.c | 121 int axi, ahb, apb0; in clock_set_pll1() local
136 apb0 = 2; /* Max 150MHz */ in clock_set_pll1()
138 printf("CPU: %uHz, AXI/AHB/APB: %d/%d/%d\n", hz, axi, ahb, apb0); in clock_set_pll1()
151 apb0 = apb0 - 1; in clock_set_pll1()
164 apb0 << APB0_DIV_SHIFT | in clock_set_pll1()
175 apb0 << APB0_DIV_SHIFT | in clock_set_pll1()
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| /u-boot/arch/arm/dts/ |
| A D | sun8i-a23-a33.dtsi | 585 apb0: apb0_clk { label
586 compatible = "allwinner,sun8i-a23-apb0-clk";
589 clock-output-names = "apb0";
593 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
595 clocks = <&apb0>;
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| A D | sun6i-a31.dtsi | 1287 apb0: apb0_clk { label
1288 compatible = "allwinner,sun6i-a31-apb0-clk";
1291 clock-output-names = "apb0";
1295 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
1297 clocks = <&apb0>;
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| A D | sun9i-a80.dtsi | 206 compatible = "allwinner,sun8i-a23-apb0-clk";
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| /u-boot/arch/riscv/dts/ |
| A D | k210.dtsi | 209 apb0: bus@50200000 { label
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| /u-boot/doc/board/sipeed/ |
| A D | maix.rst | 652 0x50200000 0x200000 apb0
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