Home
last modified time | relevance | path

Searched refs:apllcfg (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c272 reg = readl(&scg1_regs->apllcfg); in scg_apll_get_rate()
343 reg = readl(&scg1_regs->apllcfg); in scg_ddr_get_rate()
527 reg = readl(&scg1_regs->apllcfg); in decode_pll()
/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h299 u32 apllcfg; /* Auxiliary PLL Configuration Register */ member

Completed in 5 milliseconds