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Searched refs:audio_pll2_fdiv_ctl0 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h220 u32 audio_pll2_fdiv_ctl0; member
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mm.c632 pll_fdiv_ctl0 = readl(&ana_pll->audio_pll2_fdiv_ctl0); in decode_fracpll()

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