| /u-boot/arch/arm/mach-octeontx/ |
| A D | cpu.c | 48 int banks = OTX_MEM_MAP_USED; in mem_map_fill() local
52 otx_mem_map[banks].virt = 0x8c0000000000UL; in mem_map_fill()
53 otx_mem_map[banks].phys = 0x8c0000000000UL; in mem_map_fill()
54 otx_mem_map[banks].size = 0x40000000000UL; in mem_map_fill()
55 otx_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | in mem_map_fill()
57 banks = banks + 1; in mem_map_fill()
61 otx_mem_map[banks].virt = dram_start; in mem_map_fill()
62 otx_mem_map[banks].phys = dram_start; in mem_map_fill()
63 otx_mem_map[banks].size = gd->ram_size; in mem_map_fill()
64 otx_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
[all …]
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| /u-boot/arch/arm/mach-versal/ |
| A D | cpu.c | 72 int banks = VERSAL_MEM_MAP_USED; in mem_map_fill() local
75 versal_mem_map[banks].virt = 0xffe00000UL; in mem_map_fill()
76 versal_mem_map[banks].phys = 0xffe00000UL; in mem_map_fill()
77 versal_mem_map[banks].size = 0x00200000UL; in mem_map_fill()
78 versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
80 banks = banks + 1; in mem_map_fill()
97 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
98 versal_mem_map[banks].phys = gd->bd->bi_dram[i].start; in mem_map_fill()
99 versal_mem_map[banks].size = gd->bd->bi_dram[i].size; in mem_map_fill()
100 versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
[all …]
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| /u-boot/arch/arm/mach-octeontx2/ |
| A D | cpu.c | 53 int banks = OTX2_MEM_MAP_USED; in mem_map_fill() local
57 otx2_mem_map[banks].virt = dram_start; in mem_map_fill()
58 otx2_mem_map[banks].phys = dram_start; in mem_map_fill()
59 otx2_mem_map[banks].size = gd->ram_size; in mem_map_fill()
60 otx2_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
62 banks = banks + 1; in mem_map_fill()
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| /u-boot/arch/arm/mach-zynqmp/ |
| A D | cpu.c | 79 int banks = ZYNQMP_MEM_MAP_USED; in mem_map_fill() local
82 zynqmp_mem_map[banks].virt = 0xffe00000UL; in mem_map_fill()
83 zynqmp_mem_map[banks].phys = 0xffe00000UL; in mem_map_fill()
84 zynqmp_mem_map[banks].size = 0x00200000UL; in mem_map_fill()
85 zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
87 banks = banks + 1; in mem_map_fill()
96 zynqmp_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
97 zynqmp_mem_map[banks].phys = gd->bd->bi_dram[i].start; in mem_map_fill()
98 zynqmp_mem_map[banks].size = gd->bd->bi_dram[i].size; in mem_map_fill()
99 zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
[all …]
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| /u-boot/board/sipeed/maix/ |
| A D | maix.c | 20 const char * const banks[] = { "sram0", "sram1", "airam" }; in board_init() local
29 for (i = 0; i < ARRAY_SIZE(banks); i++) { in board_init()
30 ret = clk_get_by_name_nodev(memory, banks[i], &clk); in board_init()
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| /u-boot/drivers/ram/ |
| A D | bmips_ram.c | 67 unsigned int is_32b, unsigned int banks) in bmips_dram_size() argument
73 return 1 << (cols + rows + is_32b + banks); in bmips_dram_size()
78 unsigned int cols = 0, rows = 0, is_32b = 0, banks = 0; in bcm6338_get_ram_size() local
85 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in bcm6338_get_ram_size()
87 return bmips_dram_size(cols, rows, is_32b, banks); in bcm6338_get_ram_size()
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| /u-boot/board/freescale/mx6memcal/ |
| A D | spl.c | 252 .banks = 8,
266 .banks = 8,
280 .banks = 8,
294 .banks = 8,
308 .banks = 8,
322 .banks = 8,
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| /u-boot/include/ |
| A D | fdt_support.h | 111 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
112 int fdt_set_usable_memory(void *blob, u64 start[], u64 size[], int banks);
115 int banks) in fdt_fixup_memory_banks() argument
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| /u-boot/board/gateworks/gw_ventana/ |
| A D | gw_ventana_spl.c | 157 .banks = 8,
171 .banks = 8,
185 .banks = 8,
199 .banks = 8,
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| /u-boot/arch/mips/mach-jz47xx/jz4780/ |
| A D | sdram.c | 31 u32 banks = DDR_BANK8 ? 8 : 4; in sdram_size() local
35 size = (1 << (DDR_ROW + DDR_COL)) * dw * banks; in sdram_size()
39 size = (1 << (DDR_ROW + DDR_COL)) * dw * banks; in sdram_size()
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| /u-boot/doc/device-tree-bindings/memory/ |
| A D | memory.txt | 19 memory-banks - list of memory banks in the same format as normal
|
| /u-boot/board/bachmann/ot1200/ |
| A D | ot1200_spl.c | 95 .banks = 8,
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| /u-boot/board/ccv/xpress/ |
| A D | spl.c | 71 .banks = 8,
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| /u-boot/board/barco/platinum/ |
| A D | spl_picon.c | 90 .banks = 8,
|
| A D | spl_titanium.c | 90 .banks = 8,
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| /u-boot/drivers/net/octeontx2/ |
| A D | npc.h | 62 u8 banks; /* Number of MCAM banks */ member
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| /u-boot/arch/arm/dts/ |
| A D | sama5d3.dtsi | 1384 atmel,nb-banks = <1>;
1390 atmel,nb-banks = <3>;
1398 atmel,nb-banks = <3>;
1406 atmel,nb-banks = <2>;
1413 atmel,nb-banks = <2>;
1420 atmel,nb-banks = <2>;
1427 atmel,nb-banks = <2>;
1434 atmel,nb-banks = <2>;
1441 atmel,nb-banks = <2>;
1447 atmel,nb-banks = <2>;
[all …]
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| A D | sama5d4.dtsi | 142 atmel,nb-banks = <1>;
148 atmel,nb-banks = <3>;
156 atmel,nb-banks = <3>;
164 atmel,nb-banks = <2>;
172 atmel,nb-banks = <2>;
180 atmel,nb-banks = <2>;
188 atmel,nb-banks = <2>;
196 atmel,nb-banks = <2>;
204 atmel,nb-banks = <2>;
211 atmel,nb-banks = <2>;
[all …]
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| /u-boot/board/technexion/pico-imx6/ |
| A D | spl.c | 146 .banks = 8,
160 .banks = 8,
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| /u-boot/drivers/pinctrl/meson/ |
| A D | pinctrl-meson.c | 99 if (pin >= priv->data->banks[i].first && in meson_gpio_calc_reg_and_bit()
100 pin <= priv->data->banks[i].last) { in meson_gpio_calc_reg_and_bit()
101 bank = &priv->data->banks[i]; in meson_gpio_calc_reg_and_bit()
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| /u-boot/board/ge/b1x5v2/ |
| A D | spl.c | 259 .banks = 8,
272 .banks = 8,
285 .banks = 8,
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| /u-boot/board/freescale/mx6ul_14x14_evk/ |
| A D | mx6ul_14x14_evk.c | 397 .banks = 4,
468 .banks = 8,
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| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | litesom.c | 141 .banks = 8,
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| /u-boot/board/bticino/mamoj/ |
| A D | spl.c | 97 .banks = 8,
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| /u-boot/doc/device-tree-bindings/memory-controllers/ |
| A D | st,stm32-fmc.txt | 13 number of intenal banks in memory
|