Home
last modified time | relevance | path

Searched refs:base (Results 1 – 25 of 1130) sorted by relevance

12345678910>>...46

/u-boot/arch/arm/mach-keystone/
A Dddr3.c115 int ddr3_ecc_support_rmw(u32 base) in ddr3_ecc_support_rmw() argument
251 ddr3_ecc_config(base, ecc_val); in ddr3_ecc_init_range()
271 ddr3_ecc_config(base, ecc_val); in ddr3_enable_ecc()
274 void ddr3_disable_ecc(u32 base) in ddr3_disable_ecc() argument
276 ddr3_ecc_config(base, 0); in ddr3_disable_ecc()
280 static void cic_init(u32 base) in cic_init() argument
307 cic_init(base); in ddr3_map_ecc_cic2_irq()
316 ddr3_disable_ecc(base); in ddr3_init_ecc()
320 ddr3_ecc_init_range(base); in ddr3_init_ecc()
327 ddr3_enable_ecc(base, 0); in ddr3_init_ecc()
[all …]
/u-boot/drivers/clk/imx/
A Dclk-imx8mp.c279 void __iomem *base; in imx8mp_clk_probe() local
281 base = (void *)ANATOP_BASE_ADDR; in imx8mp_clk_probe()
327 base = dev_read_addr_ptr(dev); in imx8mp_clk_probe()
328 if (!base) in imx8mp_clk_probe()
347 clk_dm(IMX8MP_CLK_I2C5, imx8m_clk_composite("i2c5", imx8mp_i2c5_sels, base + 0xa480)); in imx8mp_clk_probe()
348 clk_dm(IMX8MP_CLK_I2C6, imx8m_clk_composite("i2c6", imx8mp_i2c6_sels, base + 0xa500)); in imx8mp_clk_probe()
352 clk_dm(IMX8MP_CLK_QSPI, imx8m_clk_composite("qspi", imx8mp_qspi_sels, base + 0xab80)); in imx8mp_clk_probe()
355 clk_dm(IMX8MP_CLK_I2C1, imx8m_clk_composite("i2c1", imx8mp_i2c1_sels, base + 0xad00)); in imx8mp_clk_probe()
356 clk_dm(IMX8MP_CLK_I2C2, imx8m_clk_composite("i2c2", imx8mp_i2c2_sels, base + 0xad80)); in imx8mp_clk_probe()
357 clk_dm(IMX8MP_CLK_I2C3, imx8m_clk_composite("i2c3", imx8mp_i2c3_sels, base + 0xae00)); in imx8mp_clk_probe()
[all …]
A Dclk-imx6q.c99 void *base; in imx6q_clk_probe() local
106 base + 0x30, 0x1)); in imx6q_clk_probe()
109 base + 0x10, 0x3)); in imx6q_clk_probe()
122 base = dev_read_addr_ptr(dev); in imx6q_clk_probe()
123 if (!base) in imx6q_clk_probe()
141 base + 0x24, 11, 3)); in imx6q_clk_probe()
144 base + 0x24, 16, 3)); in imx6q_clk_probe()
147 base + 0x24, 19, 3)); in imx6q_clk_probe()
150 base + 0x24, 22, 3)); in imx6q_clk_probe()
176 imx_clk_busy_mux("periph", base + 0x14, 25, 1, base + 0x48, in imx6q_clk_probe()
[all …]
A Dclk-imx8mm.c222 void __iomem *base; in imx8mm_clk_probe() local
288 base + 0x50, 13)); in imx8mm_clk_probe()
291 base + 0x84, 11)); in imx8mm_clk_probe()
342 if (!base) in imx8mm_clk_probe()
362 base + 0x8880)); in imx8mm_clk_probe()
373 base + 0xac00)); in imx8mm_clk_probe()
376 base + 0xac80)); in imx8mm_clk_probe()
389 base + 0xbc80)); in imx8mm_clk_probe()
428 base + 0xa980)); in imx8mm_clk_probe()
431 base + 0xaa00)); in imx8mm_clk_probe()
[all …]
A Dclk-imx8mn.c239 void __iomem *base; in imx8mn_clk_probe() local
305 base + 0x50, 13)); in imx8mn_clk_probe()
308 base + 0x84, 11)); in imx8mn_clk_probe()
359 if (!base) in imx8mn_clk_probe()
379 base + 0x8880)); in imx8mn_clk_probe()
390 base + 0xac00)); in imx8mn_clk_probe()
393 base + 0xac80)); in imx8mn_clk_probe()
406 base + 0xbc80)); in imx8mn_clk_probe()
445 base + 0xa980)); in imx8mn_clk_probe()
448 base + 0xaa00)); in imx8mn_clk_probe()
[all …]
A Dclk-imxrt1050.c117 void *base; in imxrt1050_clk_probe() local
137 base + 0x0, 0x7f)); in imxrt1050_clk_probe()
140 base + 0x30, 0x1)); in imxrt1050_clk_probe()
144 base + 0x10, 0x1)); in imxrt1050_clk_probe()
147 base + 0xa0, 0x7f)); in imxrt1050_clk_probe()
173 base + 0xa0, 19, 2)); in imxrt1050_clk_probe()
195 base = dev_read_addr_ptr(dev); in imxrt1050_clk_probe()
201 base + 0x10, 0, 3)); in imxrt1050_clk_probe()
230 base + 0x14, 10, 3)); in imxrt1050_clk_probe()
233 base + 0x24, 11, 3)); in imxrt1050_clk_probe()
[all …]
A Dclk-imxrt1020.c93 void *base; in imxrt1020_clk_probe() local
96 base = (void *)ANATOP_BASE_ADDR; in imxrt1020_clk_probe()
100 base + 0x30, 0x1)); in imxrt1020_clk_probe()
103 base + 0x10, 0x1)); in imxrt1020_clk_probe()
134 base = dev_read_addr_ptr(dev); in imxrt1020_clk_probe()
135 if (base == (void *)FDT_ADDR_T_NONE) in imxrt1020_clk_probe()
162 base + 0x14, 10, 3)); in imxrt1020_clk_probe()
165 base + 0x24, 11, 3)); in imxrt1020_clk_probe()
168 base + 0x24, 16, 3)); in imxrt1020_clk_probe()
171 base + 0x24, 0, 6)); in imxrt1020_clk_probe()
[all …]
/u-boot/drivers/serial/
A Dserial_mvebu_a3700.c12 void __iomem *base; member
37 void __iomem *base = plat->base; in mvebu_serial_putc() local
42 writel(ch, base + UART_TX_REG); in mvebu_serial_putc()
50 void __iomem *base = plat->base; in mvebu_serial_getc() local
61 void __iomem *base = plat->base; in mvebu_serial_pending() local
77 void __iomem *base = plat->base; in mvebu_serial_setbrg() local
97 void __iomem *base = plat->base; in mvebu_serial_probe() local
101 base + UART_CTRL_REG); in mvebu_serial_probe()
104 writel(0, base + UART_CTRL_REG); in mvebu_serial_probe()
150 base + UART_CTRL_REG); in _debug_uart_init()
[all …]
A Dserial_bcm6345.c86 void __iomem *base; member
112 readl(base + UART_FIFO_REG); in bcm6345_serial_flush()
120 bcm6345_serial_disable(base); in bcm6345_serial_init()
121 bcm6345_serial_flush(base); in bcm6345_serial_init()
124 clrsetbits_32(base + UART_CTL_REG, in bcm6345_serial_init()
168 writel(0, base + UART_IR_REG); in bcm6345_serial_init()
171 bcm6345_serial_enable(base); in bcm6345_serial_init()
233 priv->base = dev_remap_addr(dev); in bcm6345_serial_probe()
234 if (!priv->base) in bcm6345_serial_probe()
290 wait_xfered(base); in _debug_uart_putc()
[all …]
A Dserial_pic32.c43 void __iomem *base; member
60 writel(UART_TX_BRK, base + U_STASET); in pic32_serial_init()
63 writel(0, base + U_MOD); in pic32_serial_init()
64 writel(0, base + U_STA); in pic32_serial_init()
67 writel(div - 1, base + U_BRG); in pic32_serial_init()
73 writel(UART_ENABLE, base + U_MODSET); in pic32_serial_init()
81 if (readl(base + U_STA) & UART_RX_OVER) { in pic32_uart_pending_input()
82 readl(base + U_RXR); in pic32_uart_pending_input()
85 writel(UART_RX_OVER, base + U_STACLR); in pic32_uart_pending_input()
120 writel(ch, priv->base + U_TXR); in pic32_uart_putc()
[all …]
A Dserial_linflexuart.c49 __raw_writel(ibr, &base->linibrr); in _linflex_serial_setbrg()
50 __raw_writel(fbr, &base->linfbrr); in _linflex_serial_setbrg()
63 c = __raw_readl(&base->bdrm); in _linflex_serial_getc()
65 &base->uartsr); in _linflex_serial_getc()
71 __raw_writeb(c, &base->bdrl); in _linflex_serial_putc()
77 __raw_writeb((__raw_readb(&base->uartsr) | UARTSR_DTF), &base->uartsr); in _linflex_serial_putc()
92 __raw_writel(ctrl, &base->lincr1); in _linflex_serial_init()
96 __raw_writel(ctrl, &base->lincr1); in _linflex_serial_init()
112 ctrl = __raw_readl(&base->lincr1); in _linflex_serial_init()
206 linflex_serial_init_internal(base); in _debug_uart_init()
[all …]
/u-boot/drivers/net/
A Dne2000_base.c115 base = dp->base; in dp83902a_init()
148 u8 *base = dp->base; in dp83902a_stop() local
169 u8 *base = dp->base; in dp83902a_start() local
220 u8 *base = dp->base; in dp83902a_start_xmit() local
248 u8 *base = dp->base; in dp83902a_send() local
378 u8 *base = dp->base; in dp83902a_RxEvent() local
450 u8 *base = dp->base; in dp83902a_recv() local
515 u8 *base = dp->base; in dp83902a_TxEvent() local
552 u8 *base = dp->base; in dp83902a_ClearCounters() local
569 u8 *base = dp->base; in dp83902a_Overflow() local
[all …]
/u-boot/drivers/i2c/
A Dmv_i2c.c141 writel(readl(&base->icr) & ~ICR_START, &base->icr); in i2c_transfer()
142 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); in i2c_transfer()
145 writel(readl(&base->icr) | ICR_START, &base->icr); in i2c_transfer()
147 writel(readl(&base->icr) | ICR_STOP, &base->icr); in i2c_transfer()
152 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); in i2c_transfer()
153 writel(readl(&base->icr) | ICR_TB, &base->icr); in i2c_transfer()
160 writel(readl(&base->isr) | ISR_ITE, &base->isr); in i2c_transfer()
176 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); in i2c_transfer()
180 writel(readl(&base->icr) | ICR_STOP, &base->icr); in i2c_transfer()
186 writel(readl(&base->icr) | ICR_TB, &base->icr); in i2c_transfer()
[all …]
A Dintel_i2c.c61 u32 base; member
110 inb(base + SMBHSTCTL); in smbus_block_read()
118 (base + SMBHSTCTL)); in smbus_block_read()
120 outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT); in smbus_block_read()
123 outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL); in smbus_block_read()
180 outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT); in smbus_block_write()
190 outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL); in smbus_block_write()
251 ulong base; in intel_i2c_probe() local
256 base = priv->base; in intel_i2c_probe()
262 outb(inb(base + SMBHSTCTL) & ~SMBHSTCNT_INTREN, base + SMBHSTCTL); in intel_i2c_probe()
[all …]
A Docteon_i2c.c183 void __iomem *base; member
377 twsi_stop(base); in twsi_start_unstick()
378 twsi_unblock(base); in twsi_start_unstick()
396 ret = twsi_wait(base); in twsi_start()
459 ret = twsi_wait(base); in twsi_write_data()
472 ret = twsi_wait(base); in twsi_write_data()
483 twsi_stop(base); in twsi_write_data()
557 ret = twsi_wait(base); in twsi_read_data()
569 ret = twsi_wait(base); in twsi_read_data()
579 twsi_stop(base); in twsi_read_data()
[all …]
A Dfsl_i2c.c241 writeb(0, &base->cr); in fsl_i2c_fixup()
247 readb(&base->dr); in fsl_i2c_fixup()
258 writeb(0, &base->sr); in fsl_i2c_fixup()
317 csr = readb(&base->sr); in i2c_wait()
321 csr = readb(&base->sr); in i2c_wait()
352 &base->cr); in i2c_write_addr()
383 &base->cr); in __i2c_read_data()
386 readb(&base->dr); in __i2c_read_data()
395 &base->cr); in __i2c_read_data()
400 &base->cr); in __i2c_read_data()
[all …]
/u-boot/drivers/bios_emulator/
A Dbiosemui.h67 #define readb_le(base) *((u8*)(base)) argument
68 #define readw_le(base) ((u16)readb_le(base) | ((u16)readb_le((base) + 1) << 8)) argument
69 #define readl_le(base) ((u32)readb_le((base) + 0) | ((u32)readb_le((base) + 1) << 8) | \ argument
71 #define writeb_le(base, v) *((u8*)(base)) = (v) argument
72 #define writew_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \ argument
79 #define readb_le(base) *((u8*)(base)) argument
80 #define readw_le(base) *((u16*)(base)) argument
81 #define readl_le(base) *((u32*)(base)) argument
82 #define writeb_le(base, v) *((u8*)(base)) = (v) argument
83 #define writew_le(base, v) *((u16*)(base)) = (v) argument
[all …]
/u-boot/arch/arm/mach-uniphier/clk/
A Dpll-base-ld20.c39 tmp = readl(base); /* SSCPLLCTRL */ in uniphier_ld20_sscpll_init()
44 writel(tmp, base); in uniphier_ld20_sscpll_init()
46 tmp = readl(base + 4); in uniphier_ld20_sscpll_init()
51 writel(tmp, base + 4); in uniphier_ld20_sscpll_init()
58 writel(tmp, base + 4); in uniphier_ld20_sscpll_init()
70 writel(tmp, base); in uniphier_ld20_sscpll_ssc_en()
83 writel(tmp, base + 8); in uniphier_ld20_sscpll_set_regi()
95 writel(tmp, base); in uniphier_ld20_vpll27_init()
99 writel(tmp, base + 8); in uniphier_ld20_vpll27_init()
103 writel(tmp, base); in uniphier_ld20_vpll27_init()
[all …]
/u-boot/drivers/clk/at91/
A Dclk-sam9x60-pll.c41 void __iomem *base; member
98 void __iomem *base = pll->base; in sam9x60_frac_pll_set_rate() local
124 pmc_write(base, AT91_PMC_PLL_CTRL1, in sam9x60_frac_pll_set_rate()
143 void __iomem *base = pll->base; in sam9x60_frac_pll_get_rate() local
162 void __iomem *base = pll->base; in sam9x60_frac_pll_enable() local
227 void __iomem *base = pll->base; in sam9x60_frac_pll_disable() local
257 void __iomem *base = pll->base; in sam9x60_div_pll_enable() local
287 void __iomem *base = pll->base; in sam9x60_div_pll_disable() local
305 void __iomem *base = pll->base; in sam9x60_div_pll_set_rate() local
346 void __iomem *base = pll->base; in sam9x60_div_pll_get_rate() local
[all …]
/u-boot/drivers/virtio/
A Dvirtio_mmio.c26 void __iomem *base = priv->base + VIRTIO_MMIO_CONFIG; in virtio_mmio_get_config() local
36 ptr[i] = readb(base + offset + i); in virtio_mmio_get_config()
43 b = readb(base + offset); in virtio_mmio_get_config()
47 w = cpu_to_le16(readw(base + offset)); in virtio_mmio_get_config()
51 l = cpu_to_le32(readl(base + offset)); in virtio_mmio_get_config()
55 l = cpu_to_le32(readl(base + offset)); in virtio_mmio_get_config()
71 void __iomem *base = priv->base + VIRTIO_MMIO_CONFIG; in virtio_mmio_set_config() local
81 writeb(ptr[i], base + offset + i); in virtio_mmio_set_config()
89 writeb(b, base + offset); in virtio_mmio_set_config()
93 writew(le16_to_cpu(w), base + offset); in virtio_mmio_set_config()
[all …]
/u-boot/lib/
A Dlmb.c86 rgn->region[i].base = rgn->region[i + 1].base; in lmb_remove_region()
150 rgn->region[0].base = base; in lmb_add_region()
193 if (base < rgn->region[i].base) { in lmb_add_region()
194 rgn->region[i + 1].base = rgn->region[i].base; in lmb_add_region()
197 rgn->region[i + 1].base = base; in lmb_add_region()
203 if (base < rgn->region[0].base) { in lmb_add_region()
204 rgn->region[0].base = base; in lmb_add_region()
266 rgn->region[i].size = base - rgn->region[i].base; in lmb_free()
333 base = min(base, max_addr); in __lmb_alloc_base()
334 base = lmb_align_down(base - size, align); in __lmb_alloc_base()
[all …]
A Dstrto.c19 if (*base == 0) { in _parse_integer_fixup_radix()
22 *base = 16; in _parse_integer_fixup_radix()
24 *base = 8; in _parse_integer_fixup_radix()
26 *base = 10; in _parse_integer_fixup_radix()
34 unsigned int base) in simple_strtoul() argument
39 cp = _parse_integer_fixup_radix(cp, &base); in simple_strtoul()
43 result = result*base + value; in simple_strtoul()
64 val = simple_strtoul(cp, &tail, base); in strict_strtoul()
82 return simple_strtoul(cp, endp, base); in simple_strtol()
128 unsigned int base) in simple_strtoull() argument
[all …]
/u-boot/drivers/pch/
A Dpch9.c27 u32 base; in pch9_get_gpio_base() local
39 dm_pci_read_config32(dev, GPIO_BASE, &base); in pch9_get_gpio_base()
40 if (base == 0x00000000 || base == 0xffffffff) { in pch9_get_gpio_base()
51 *gbasep = base & 1 ? base & ~3 : base & ~15; in pch9_get_gpio_base()
58 u32 base; in pch9_get_io_base() local
60 dm_pci_read_config32(dev, IO_BASE, &base); in pch9_get_io_base()
61 if (base == 0x00000000 || base == 0xffffffff) { in pch9_get_io_base()
66 *iobasep = base & 1 ? base & ~3 : base & ~15; in pch9_get_io_base()
/u-boot/board/intel/galileo/
A Dgalileo.c23 u32 base, port, val; in board_assert_perst() local
26 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); in board_assert_perst()
27 base = (base & 0xffff) & ~0x7f; in board_assert_perst()
30 port = base + 0x20; in board_assert_perst()
36 port = base + 0x24; in board_assert_perst()
42 port = base + 0x28; in board_assert_perst()
50 u32 base, port, val; in board_deassert_perst() local
53 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); in board_deassert_perst()
54 base = (base & 0xffff) & ~0x7f; in board_deassert_perst()
57 port = base + 0x28; in board_deassert_perst()
/u-boot/drivers/soc/ti/
A Dkeystone_serdes.c158 base + SERDES_PLL_CTL_REG); in ks2_serdes_pll_enable()
164 ks2_serdes_rmw(base + SERDES_LANE_REG_028(lane), in ks2_serdes_lane_reset()
167 ks2_serdes_rmw(base + SERDES_LANE_REG_028(lane), in ks2_serdes_lane_reset()
171 static void ks2_serdes_lane_enable(u32 base, in ks2_serdes_lane_enable() argument
175 ks2_serdes_lane_reset(base, 0, lane); in ks2_serdes_lane_enable()
179 base + SERDES_LANE_CTL_STATUS_REG(lane)); in ks2_serdes_lane_enable()
183 ks2_serdes_rmw(base + SERDES_LANE_REG_000(lane), in ks2_serdes_lane_enable()
201 ks2_serdes_init_cfg(base, &cfgs[i], num_lanes); in ks2_serdes_init()
203 ks2_serdes_cmu_comlane_enable(base, serdes); in ks2_serdes_init()
205 ks2_serdes_lane_enable(base, serdes, i); in ks2_serdes_init()
[all …]

Completed in 76 milliseconds

12345678910>>...46