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/u-boot/arch/arm/include/asm/arch-mx25/
A Dimx-regs.h471 #define WEIM_CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \ argument
473 ((sp) << 31 | (wp) << 30 | (bcd) << 28 | (bcs) << 24 | \
/u-boot/arch/arm/include/asm/arch-mx31/
A Dimx-regs.h628 #define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \ argument
630 ((sp) << 31 | (wp) << 30 | (bcd) << 28 | (psz) << 22 | (pme) << 21 |\

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