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Searched refs:best_diff_khz (Results 1 – 4 of 4) sorted by relevance

/u-boot/drivers/clk/rockchip/
A Dclk_rk3128.c85 u32 diff_khz, best_diff_khz; in pll_para_config() local
114 best_diff_khz = vco_khz; in pll_para_config()
115 for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) { in pll_para_config()
127 if (diff_khz >= best_diff_khz) in pll_para_config()
130 best_diff_khz = diff_khz; in pll_para_config()
135 if (best_diff_khz > 4 * (1000)) { in pll_para_config()
138 best_diff_khz * 1000); in pll_para_config()
A Dclk_rk3288.c238 uint diff_khz, best_diff_khz; in pll_para_config() local
271 best_diff_khz = vco_khz; in pll_para_config()
272 for (nr = 1; nr < max_nr && best_diff_khz; nr++) { in pll_para_config()
288 if (diff_khz >= best_diff_khz) in pll_para_config()
291 best_diff_khz = diff_khz; in pll_para_config()
296 if (best_diff_khz > 4 * 1000) { in pll_para_config()
298 __func__, freq_hz, best_diff_khz * 1000); in pll_para_config()
A Dclk_rk3399.c373 u32 diff_khz, best_diff_khz; in pll_para_config() local
402 best_diff_khz = vco_khz; in pll_para_config()
403 for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) { in pll_para_config()
415 if (diff_khz >= best_diff_khz) in pll_para_config()
418 best_diff_khz = diff_khz; in pll_para_config()
423 if (best_diff_khz > 4 * (MHz / KHz)) { in pll_para_config()
426 best_diff_khz * KHz); in pll_para_config()
A Dclk_px30.c104 u32 diff_khz, best_diff_khz; in pll_clk_set_by_auto() local
133 best_diff_khz = vco_khz; in pll_clk_set_by_auto()
134 for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) { in pll_clk_set_by_auto()
147 if (diff_khz >= best_diff_khz) in pll_clk_set_by_auto()
150 best_diff_khz = diff_khz; in pll_clk_set_by_auto()
155 if (best_diff_khz > 4 * (MHz / KHz)) { in pll_clk_set_by_auto()
158 best_diff_khz * KHz); in pll_clk_set_by_auto()

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