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Searched refs:best_m (Results 1 – 4 of 4) sorted by relevance

/u-boot/drivers/video/sunxi/
A Dlcdc.c217 int best_n = 0, best_m = 0, best_diff = 0x0FFFFFFF; in lcdc_pll_set() local
255 best_m = m; in lcdc_pll_set()
273 best_m = m; in lcdc_pll_set()
287 best_m = 6; /* Minimum m for tcon0 */ in lcdc_pll_set()
292 clock_set_mipi_pll(best_m * dotclock * 1000); in lcdc_pll_set()
294 dotclock, clock_get_mipi_pll() / best_m / 1000); in lcdc_pll_set()
301 (best_double + 1) * clock_get_pll3() / best_m / 1000, in lcdc_pll_set()
302 best_double + 1, step, best_n, best_m); in lcdc_pll_set()
327 CCM_LCD_CH1_CTRL_M(best_m), &ccm->lcd0_ch1_clk_cfg); in lcdc_pll_set()
334 *clk_div = best_m; in lcdc_pll_set()
A Dsunxi_dw_hdmi.c217 int best_n = 0, best_m = 0, best_div = 0, best_diff = 0x0FFFFFFF; in sunxi_dw_hdmi_pll_set() local
240 best_m = m; in sunxi_dw_hdmi_pll_set()
250 clock_set_pll3_factors(best_m, best_n); in sunxi_dw_hdmi_pll_set()
253 best_n, best_m, best_div); in sunxi_dw_hdmi_pll_set()
/u-boot/arch/arm/mach-sunxi/
A Dclock_sun6i.c224 unsigned best_k = 0, best_m = 0, best_n = 0, best_diff = 0xffffffff; in clock_set_mipi_pll() local
243 best_m = m; in clock_set_mipi_pll()
255 CCM_MIPI_PLL_CTRL_M(best_m), &ccm->mipi_pll_cfg); in clock_set_mipi_pll()
/u-boot/arch/arm/mach-tegra/tegra124/
A Dclock.c1071 u32 diff, best_diff, best_m = 0, best_n = 0, best_p; in clock_set_display_rate() local
1110 best_m = divm; in clock_set_display_rate()
1126 rounded_rate = (ref / best_m * best_n) >> best_p; in clock_set_display_rate()
1130 __func__, rounded_rate, ref, best_m, best_n, best_p, cpcon); in clock_set_display_rate()
1135 clock_set_rate(CLOCK_ID_DISPLAY, best_n, best_m, best_p, cpcon); in clock_set_display_rate()

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