| /u-boot/arch/arm/mach-rockchip/ |
| A D | sdram.c | 45 gd->bd->bi_dram[0].start = 0x200000; in dram_init_banksize()
46 gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; in dram_init_banksize()
55 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
60 gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start; in dram_init_banksize()
62 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
63 gd->bd->bi_dram[0].size = 0x8400000; in dram_init_banksize()
65 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE in dram_init_banksize()
66 + gd->bd->bi_dram[0].size + 0x2000000; in dram_init_banksize()
67 gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start; in dram_init_banksize()
70 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
[all …]
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| /u-boot/arch/arm/mach-mvebu/armada8k/ |
| A D | dram.c | 41 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in a8k_dram_init_banksize()
43 gd->bd->bi_dram[0].size = gd->ram_size; in a8k_dram_init_banksize()
47 gd->bd->bi_dram[0].size = max_bank0_size; in a8k_dram_init_banksize()
49 gd->bd->bi_dram[1].start = SZ_4G; in a8k_dram_init_banksize()
50 gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size; in a8k_dram_init_banksize()
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| /u-boot/arch/arm/mach-versal/ |
| A D | cpu.c | 85 if (!gd->bd->bi_dram[i].size) in mem_map_fill()
89 if (gd->bd->bi_dram[i].start < 0x80000000UL || in mem_map_fill()
90 gd->bd->bi_dram[i].start > 0x100000000UL) { in mem_map_fill()
92 gd->bd->bi_dram[i].start, in mem_map_fill()
93 gd->bd->bi_dram[i].size); in mem_map_fill()
97 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
98 versal_mem_map[banks].phys = gd->bd->bi_dram[i].start; in mem_map_fill()
99 versal_mem_map[banks].size = gd->bd->bi_dram[i].size; in mem_map_fill()
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| /u-boot/board/samsung/smdkv310/ |
| A D | smdkv310.c | 60 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
61 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, in dram_init_banksize()
63 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
64 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, in dram_init_banksize()
66 gd->bd->bi_dram[2].start = PHYS_SDRAM_3; in dram_init_banksize()
67 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, in dram_init_banksize()
69 gd->bd->bi_dram[3].start = PHYS_SDRAM_4; in dram_init_banksize()
70 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, in dram_init_banksize()
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| /u-boot/arch/arm/mach-imx/mx5/ |
| A D | mx53_dram.c | 39 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
40 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); in dram_init_banksize()
42 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
43 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); in dram_init_banksize()
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| /u-boot/arch/arm/cpu/arm926ejs/armada100/ |
| A D | dram.c | 82 gd->bd->bi_dram[i].start = armd1_sdram_base(i); in dram_init()
83 gd->bd->bi_dram[i].size = armd1_sdram_size(i); in dram_init()
90 if (gd->bd->bi_dram[i].start != gd->ram_size) in dram_init()
93 gd->ram_size += gd->bd->bi_dram[i].size; in dram_init()
102 gd->bd->bi_dram[i].start = 0; in dram_init()
103 gd->bd->bi_dram[i].size = 0; in dram_init()
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| /u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | cpu.c | 1397 if (gd->bd->bi_dram[2].size >= in tfa_dram_init_banksize()
1400 gd->bd->bi_dram[2].size - in tfa_dram_init_banksize()
1405 if (gd->bd->bi_dram[1].size >= in tfa_dram_init_banksize()
1408 gd->bd->bi_dram[1].size - in tfa_dram_init_banksize()
1413 gd->bd->bi_dram[0].size - in tfa_dram_init_banksize()
1460 gd->bd->bi_dram[2].size = gd->bd->bi_dram[1].size - in dram_init_banksize()
1469 if (gd->bd->bi_dram[0].size > in dram_init_banksize()
1471 gd->bd->bi_dram[0].size -= in dram_init_banksize()
1483 if (gd->bd->bi_dram[2].size >= in dram_init_banksize()
1494 gd->bd->bi_dram[1].size - in dram_init_banksize()
[all …]
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| /u-boot/board/broadcom/bcmns2/ |
| A D | northstar2.c | 51 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
52 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
54 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE; in dram_init_banksize()
55 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; in dram_init_banksize()
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| /u-boot/arch/arm/mach-uniphier/ |
| A D | fdt-fixup.c | 31 for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) { in uniphier_ld20_fdt_mem_rsv()
32 if (!bd->bi_dram[i].size) in uniphier_ld20_fdt_mem_rsv()
35 rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size; in uniphier_ld20_fdt_mem_rsv()
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| /u-boot/arch/arm/mach-tegra/ |
| A D | board2.c | 373 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
374 gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); in dram_init_banksize()
377 gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; in dram_init_banksize()
382 gd->bd->bi_dram[1].start = 0x100000000; in dram_init_banksize()
383 gd->bd->bi_dram[1].size = gd->ram_size - SZ_2G; in dram_init_banksize()
387 gd->bd->bi_dram[1].start = 0; in dram_init_banksize()
388 gd->bd->bi_dram[1].size = 0; in dram_init_banksize()
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| /u-boot/common/init/ |
| A D | handoff.c | 22 ho->ram_bank[i].start = bd->bi_dram[i].start; in handoff_save_dram()
23 ho->ram_bank[i].size = bd->bi_dram[i].size; in handoff_save_dram()
38 bd->bi_dram[i].start = ho->ram_bank[i].start; in handoff_load_dram_banks()
39 bd->bi_dram[i].size = ho->ram_bank[i].size; in handoff_load_dram_banks()
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| /u-boot/arch/x86/lib/fsp/ |
| A D | fsp_dram.c | 53 gd->bd->bi_dram[0].start = 0; in dram_init_banksize()
54 gd->bd->bi_dram[0].size = gd->ram_size; in dram_init_banksize()
77 gd->bd->bi_dram[bank].start = res_desc->phys_start; in dram_init_banksize()
78 gd->bd->bi_dram[bank].size = res_desc->len; in dram_init_banksize()
82 gd->bd->bi_dram[bank].start, in dram_init_banksize()
83 gd->bd->bi_dram[bank].size); in dram_init_banksize()
88 gd->bd->bi_dram[0].start = 0; in dram_init_banksize()
89 gd->bd->bi_dram[0].size = low_end; in dram_init_banksize()
169 ho->arch.usable_ram_top = gd->bd->bi_dram[0].size; in handoff_arch_save()
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| /u-boot/board/AndesTech/adp-ae3xx/ |
| A D | adp-ae3xx.c | 54 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; in dram_init_banksize()
55 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; in dram_init_banksize()
56 gd->bd->bi_dram[1].start = PHYS_SDRAM_1; in dram_init_banksize()
57 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
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| /u-boot/board/AndesTech/adp-ag101p/ |
| A D | adp-ag101p.c | 61 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; in dram_init_banksize()
62 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; in dram_init_banksize()
63 gd->bd->bi_dram[1].start = PHYS_SDRAM_1; in dram_init_banksize()
64 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
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| /u-boot/board/kontron/sl28/ |
| A D | sl28.c | 51 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); in detail_board_ddr_info()
67 base[i] = gd->bd->bi_dram[i].start; in ft_board_setup()
68 size[i] = gd->bd->bi_dram[i].size; in ft_board_setup()
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| A D | spl_atf.c | 39 dram_regions_info.region[i].addr = gd->bd->bi_dram[i].start; in bl2_plat_get_bl31_params_v2()
40 dram_regions_info.region[i].size = gd->bd->bi_dram[i].size; in bl2_plat_get_bl31_params_v2()
41 dram_regions_info.total_dram_size += gd->bd->bi_dram[i].size; in bl2_plat_get_bl31_params_v2()
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| /u-boot/arch/x86/cpu/qemu/ |
| A D | dram.c | 54 gd->bd->bi_dram[0].start = 0; in dram_init_banksize()
55 gd->bd->bi_dram[0].size = qemu_get_low_memory_size(); in dram_init_banksize()
59 gd->bd->bi_dram[1].start = SZ_4G; in dram_init_banksize()
60 gd->bd->bi_dram[1].size = high_mem_size; in dram_init_banksize()
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| /u-boot/board/hisilicon/hikey/ |
| A D | hikey.c | 469 gd->bd->bi_dram[0].size = 0x05e00000; in dram_init_banksize()
471 gd->bd->bi_dram[1].start = 0x05f00000; in dram_init_banksize()
472 gd->bd->bi_dram[1].size = 0x00001000; in dram_init_banksize()
474 gd->bd->bi_dram[2].start = 0x05f02000; in dram_init_banksize()
475 gd->bd->bi_dram[2].size = 0x00efd000; in dram_init_banksize()
477 gd->bd->bi_dram[3].start = 0x06e00000; in dram_init_banksize()
478 gd->bd->bi_dram[3].size = 0x0060f000; in dram_init_banksize()
480 gd->bd->bi_dram[4].start = 0x07410000; in dram_init_banksize()
481 gd->bd->bi_dram[4].size = 0x1aaf0000; in dram_init_banksize()
483 gd->bd->bi_dram[5].start = 0x22000000; in dram_init_banksize()
[all …]
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| /u-boot/arch/arm/mach-imx/imx8/ |
| A D | cpu.c | 364 gd->bd->bi_dram[current_bank].start) { in dram_bank_sort()
368 gd->bd->bi_dram[current_bank - 1].start = in dram_bank_sort()
369 gd->bd->bi_dram[current_bank].start; in dram_bank_sort()
370 gd->bd->bi_dram[current_bank - 1].size = in dram_bank_sort()
371 gd->bd->bi_dram[current_bank].size; in dram_bank_sort()
402 gd->bd->bi_dram[i].start = start; in dram_init_banksize()
405 gd->bd->bi_dram[i].size = in dram_init_banksize()
408 gd->bd->bi_dram[i].size = end1 - start; in dram_init_banksize()
413 gd->bd->bi_dram[i].start = start; in dram_init_banksize()
416 gd->bd->bi_dram[i].size = in dram_init_banksize()
[all …]
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| /u-boot/arch/arm/mach-orion5x/ |
| A D | dram.c | 51 gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); in dram_init_banksize()
52 gd->bd->bi_dram[i].size = get_ram_size( in dram_init_banksize()
53 (long *) (gd->bd->bi_dram[i].start), in dram_init_banksize()
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| /u-boot/board/samsung/goni/ |
| A D | goni.c | 61 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
62 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
63 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
64 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; in dram_init_banksize()
65 gd->bd->bi_dram[2].start = PHYS_SDRAM_3; in dram_init_banksize()
66 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; in dram_init_banksize()
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| /u-boot/arch/x86/cpu/ivybridge/ |
| A D | sdram_nop.c | 15 gd->bd->bi_dram[0].start = 0; in dram_init()
16 gd->bd->bi_dram[0].size = gd->ram_size; in dram_init()
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| /u-boot/board/freescale/ls2080aqds/ |
| A D | ls2080aqds.c | 287 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); in detail_board_ddr_info()
290 if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { in detail_board_ddr_info()
292 print_size(gd->bd->bi_dram[2].size, ""); in detail_board_ddr_info()
336 base[0] = gd->bd->bi_dram[0].start; in ft_board_setup()
337 size[0] = gd->bd->bi_dram[0].size; in ft_board_setup()
338 base[1] = gd->bd->bi_dram[1].start; in ft_board_setup()
339 size[1] = gd->bd->bi_dram[1].size; in ft_board_setup()
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| /u-boot/arch/x86/cpu/efi/ |
| A D | sdram.c | 28 gd->bd->bi_dram[0].start = efi_get_ram_base(); in dram_init_banksize()
29 gd->bd->bi_dram[0].size = CONFIG_EFI_RAM_SIZE; in dram_init_banksize()
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| /u-boot/api/ |
| A D | api_platform-arm.c | 32 platform_set_mr(si, gd->bd->bi_dram[i].start, in platform_sys_info()
33 gd->bd->bi_dram[i].size, MR_ATTR_DRAM); in platform_sys_info()
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