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Searched refs:bit3 (Results 1 – 21 of 21) sorted by relevance

/u-boot/board/d-link/dns325/
A Dkwbimage.cfg35 # bit3-0: 0 required
52 # bit3-0: 1, 18 cycle tRAS (tRAS[3-0])
71 # bit3-2: 3, Cs0size=1Gb
89 # bit3-0: 0, Cmd=Normal SDRAM Mode
94 # bit3: 0, Burst Type (0 required)
116 # bit3: 1, MBUS Burst Chop disabled
127 # bit3-0: 0 required
135 # bit3-0: 2, 2 cycles from write comand to assertion of M_ODT signal
145 # bit3-2: 0x0, CS0 hit selected
153 # bit3-2: 1, CS1 hit selected
[all …]
/u-boot/board/buffalo/lsxl/
A Dkwbimage-lschl.cfg37 # bit3-0: 0 required
55 # bit3-0: 0xf, 16 cycle tRAS (tRAS[3-0])
76 # bit3-2: 2, Cs0size=512Mbit
96 # bit3-0: 0, Cmd=Normal SDRAM Mode
102 # bit3: 0, Burst Type (0 required)
126 # bit3: 1, MBUS Burst Chop disabled
138 # bit3-0: 0 required
147 # bit3-0: 2, 2 cycles from write comand to assertion of M_ODT signal
161 # bit3-2: 0x0, CS0 hit selected
179 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM
[all …]
A Dkwbimage-lsxhl.cfg37 # bit3-0: 0 required
55 # bit3-0: 0x1, 18 cycle tRAS (tRAS[3-0])
76 # bit3-2: 3, Cs0size=1Gbit
96 # bit3-0: 0, Cmd=Normal SDRAM Mode
102 # bit3: 0, Burst Type (0 required)
126 # bit3: 1, MBUS Burst Chop disabled
138 # bit3-0: 0 required
147 # bit3-0: 2, 2 cycles from write comand to assertion of M_ODT signal
161 # bit3-2: 0x0, CS0 hit selected
179 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM
[all …]
/u-boot/tools/
A Dvybridimage.c45 uint8_t bit3 = (byte & (1 << 3)) ? 1 : 0; in vybridimage_sw_ecc() local
52 res |= ((bit6 ^ bit5 ^ bit3 ^ bit2) << 0); in vybridimage_sw_ecc()
55 res |= ((bit7 ^ bit4 ^ bit3 ^ bit0) << 3); in vybridimage_sw_ecc()
56 res |= ((bit6 ^ bit4 ^ bit3 ^ bit2 ^ bit1 ^ bit0) << 4); in vybridimage_sw_ecc()
/u-boot/board/keymile/km_arm/
A Dkwbimage-memphis.cfg66 # bit3-0: TRAS lsbs
85 # bit3-2: 00, Cs0size=2Gb
103 # bit3-0: 0x0, DDR cmd
121 # bit3 : 1 , MBUS Burst Chop disabled
132 # bit3-0 : 0000, required
140 # bit3-0 : 0001, M_ODT assertion same cycle as write
149 # bit3-2: 00, CS0 hit selected
158 # bit3-0: 0, ODT0Rd, MODT[0] not asserted during read from DRAM CS0
163 # bit3-2: 00, ODT1 controlled by register
167 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
A Dkwbimage.cfg63 # bit3-0: TRAS lsbs
82 # bit3-2: 11, Cs0size=1Gb
100 # bit3-0: 0x0, DDR cmd
118 # bit3 : 1 , MBUS Burst Chop disabled
134 # bit3-2: 00, CS0 hit selected
143 # bit3-0: 0, ODT0Rd, MODT[0] asserted during read from DRAM CS0
148 # bit3-2: 00, ODT1 controlled by register
152 # bit3-0: F, ODT0Rd, Internal ODT asserted during read from DRAM bank0
/u-boot/board/LaCie/netspace_v2/
A Dkwbimage-is2.cfg61 # bit3-2: 10, Cs0size=512Mb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
132 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
137 # bit3-2: 01, ODT1 active NEVER!
141 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
A Dkwbimage-ns2l.cfg61 # bit3-2: 10, Cs0size=512Mb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
132 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
137 # bit3-2: 01, ODT1 active NEVER!
141 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
A Dkwbimage.cfg61 # bit3-2: 11, Cs0size=1Gb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
132 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
137 # bit3-2: 01, ODT1 active NEVER!
141 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
/u-boot/board/cloudengines/pogo_e02/
A Dkwbimage.cfg46 # bit3-0: TRAS lsbs
65 # bit3-2: 11, Cs0size=1Gb
83 # bit3-0: 0x0, DDR cmd
88 # bit3: 0, BurstType=0 required
110 # bit3 : 1 , MBUS Burst Chop disabled
127 # bit3-2: 00, CS0 hit selected
138 # bit3-0: 2, ODT0Rd, MODT[0] asserted during read from DRAM CS1
145 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/iomega/iconnect/
A Dkwbimage.cfg42 # bit3-0: TRAS lsbs
61 # bit3-2: 11, Cs0size (1Gb)
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0x0, BurstType=0 required
106 # bit3: 0x1, MBUS Burst Chop disabled
123 # bit3-2: 0x0, CS0 hit selected
134 # bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1
141 # bit3-2: 0x1, ODT1 active NEVER!
/u-boot/board/Marvell/openrd/
A Dkwbimage.cfg42 # bit3-0: TRAS lsbs
61 # bit3-2: 11, Cs0size=1Gb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
134 # bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1
141 # bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3
/u-boot/board/raidsonic/ib62x0/
A Dkwbimage.cfg43 # bit3-0: TRAS lsbs
62 # bit3-2: 11, Cs0size (1Gb)
80 # bit3-0: 0x0, DDR cmd
85 # bit3: 0x0, BurstType=0 required
107 # bit3: 0x1, MBUS Burst Chop disabled
124 # bit3-2: 0x0, CS0 hit selected
135 # bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1
142 # bit3-2: 0x1, ODT1 active NEVER!
/u-boot/board/LaCie/net2big_v2/
A Dkwbimage.cfg61 # bit3-2: 11, Cs0size=1Gb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
132 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
137 # bit3-2: 01, ODT1 active NEVER!
141 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
/u-boot/board/Marvell/sheevaplug/
A Dkwbimage.cfg42 # bit3-0: TRAS lsbs
61 # bit3-2: 11, Cs0size=1Gb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
136 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/Seagate/dockstar/
A Dkwbimage.cfg45 # bit3-0: TRAS lsbs
64 # bit3-2: 11, Cs0size=1Gb
82 # bit3-0: 0x0, DDR cmd
87 # bit3: 0, BurstType=0 required
109 # bit3 : 1 , MBUS Burst Chop disabled
126 # bit3-2: 00, CS0 hit selected
139 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/Seagate/goflexhome/
A Dkwbimage.cfg48 # bit3-0: TRAS lsbs
67 # bit3-2: 11, Cs0size=1Gb
85 # bit3-0: 0x0, DDR cmd
90 # bit3: 0, BurstType=0 required
112 # bit3 : 1 , MBUS Burst Chop disabled
129 # bit3-2: 00, CS0 hit selected
142 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/Synology/ds109/
A Dkwbimage.cfg46 # bit3-0: TRAS lsbs
65 # bit3-2: 10, Cs0size=1Gb
83 # bit3-0: 0x0, DDR cmd
88 # bit3: 0, BurstType=0 required
110 # bit3 : 1 , MBUS Burst Chop disabled
127 # bit3-2: 00, CS0 hit selected
142 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/Marvell/dreamplug/
A Dkwbimage.cfg43 # bit3-0: TRAS lsbs
62 # bit3-2: 10, Cs0size=1Gb
80 # bit3-0: 0x0, DDR cmd
85 # bit3: 0, BurstType=0 required
107 # bit3 : 1 , MBUS Burst Chop disabled
124 # bit3-2: 00, CS0 hit selected
137 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/Marvell/guruplug/
A Dkwbimage.cfg42 # bit3-0: TRAS lsbs
61 # bit3-2: 10, Cs0size=1Gb
79 # bit3-0: 0x0, DDR cmd
84 # bit3: 0, BurstType=0 required
106 # bit3 : 1 , MBUS Burst Chop disabled
123 # bit3-2: 00, CS0 hit selected
136 # bit3-2: 01, ODT1 active NEVER!
/u-boot/board/Seagate/nas220/
A Dkwbimage.cfg66 # bit3-2: 11, Cs0size=1Gb
84 # bit3-0: 0x0, DDR cmd
89 # bit3: 0, BurstType=0 required
112 # bit3 : 1 , MBUS Burst Chop disabled
125 # bit3-2: 00, CS0 hit selected
139 # bit3-2: 01, ODT1 active NEVER!

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