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/u-boot/arch/arm/dts/
A Dmeson-g12b-a311d.dtsi15 opp-hz = /bits/ 64 <100000000>;
20 opp-hz = /bits/ 64 <250000000>;
25 opp-hz = /bits/ 64 <500000000>;
30 opp-hz = /bits/ 64 <667000000>;
35 opp-hz = /bits/ 64 <1000000000>;
40 opp-hz = /bits/ 64 <1200000000>;
45 opp-hz = /bits/ 64 <1398000000>;
50 opp-hz = /bits/ 64 <1512000000>;
55 opp-hz = /bits/ 64 <1608000000>;
75 opp-hz = /bits/ 64 <100000000>;
[all …]
A Dmeson-g12b-s922x.dtsi15 opp-hz = /bits/ 64 <100000000>;
20 opp-hz = /bits/ 64 <250000000>;
25 opp-hz = /bits/ 64 <500000000>;
30 opp-hz = /bits/ 64 <667000000>;
35 opp-hz = /bits/ 64 <1000000000>;
40 opp-hz = /bits/ 64 <1200000000>;
45 opp-hz = /bits/ 64 <1398000000>;
50 opp-hz = /bits/ 64 <1512000000>;
55 opp-hz = /bits/ 64 <1608000000>;
80 opp-hz = /bits/ 64 <100000000>;
[all …]
A Drk3399-op1-opp.dtsi12 opp-hz = /bits/ 64 <408000000>;
17 opp-hz = /bits/ 64 <600000000>;
21 opp-hz = /bits/ 64 <816000000>;
25 opp-hz = /bits/ 64 <1008000000>;
29 opp-hz = /bits/ 64 <1200000000>;
33 opp-hz = /bits/ 64 <1416000000>;
37 opp-hz = /bits/ 64 <1512000000>;
47 opp-hz = /bits/ 64 <408000000>;
52 opp-hz = /bits/ 64 <600000000>;
56 opp-hz = /bits/ 64 <816000000>;
[all …]
A Drk3399-opp.dtsi12 opp-hz = /bits/ 64 <408000000>;
17 opp-hz = /bits/ 64 <600000000>;
21 opp-hz = /bits/ 64 <816000000>;
25 opp-hz = /bits/ 64 <1008000000>;
29 opp-hz = /bits/ 64 <1200000000>;
33 opp-hz = /bits/ 64 <1416000000>;
43 opp-hz = /bits/ 64 <408000000>;
48 opp-hz = /bits/ 64 <600000000>;
52 opp-hz = /bits/ 64 <816000000>;
56 opp-hz = /bits/ 64 <1008000000>;
[all …]
A Dsun50i-a64-cpu-opp.dtsi12 opp-hz = /bits/ 64 <648000000>;
18 opp-hz = /bits/ 64 <816000000>;
24 opp-hz = /bits/ 64 <912000000>;
30 opp-hz = /bits/ 64 <960000000>;
36 opp-hz = /bits/ 64 <1008000000>;
42 opp-hz = /bits/ 64 <1056000000>;
48 opp-hz = /bits/ 64 <1104000000>;
54 opp-hz = /bits/ 64 <1152000000>;
A Dimx7d-pico-hobbit.dts69 ti,x-min = /bits/ 16 <0>;
70 ti,x-max = /bits/ 16 <4095>;
71 ti,y-min = /bits/ 16 <0>;
72 ti,y-max = /bits/ 16 <4095>;
73 ti,pressure-max = /bits/ 16 <1024>;
74 ti,x-plate-ohms = /bits/ 16 <90>;
75 ti,y-plate-ohms = /bits/ 16 <90>;
76 ti,debounce-max = /bits/ 16 <70>;
77 ti,debounce-tol = /bits/ 16 <3>;
78 ti,debounce-rep = /bits/ 16 <2>;
[all …]
A Dmeson-g12a.dtsi61 opp-hz = /bits/ 64 <100000000>;
66 opp-hz = /bits/ 64 <250000000>;
71 opp-hz = /bits/ 64 <500000000>;
76 opp-hz = /bits/ 64 <666666666>;
81 opp-hz = /bits/ 64 <1000000000>;
86 opp-hz = /bits/ 64 <1200000000>;
91 opp-hz = /bits/ 64 <1398000000>;
96 opp-hz = /bits/ 64 <1512000000>;
101 opp-hz = /bits/ 64 <1608000000>;
106 opp-hz = /bits/ 64 <1704000000>;
[all …]
A Dmeson-gx-mali450.dtsi12 opp-hz = /bits/ 64 <125000000>;
16 opp-hz = /bits/ 64 <250000000>;
20 opp-hz = /bits/ 64 <285714285>;
24 opp-hz = /bits/ 64 <400000000>;
28 opp-hz = /bits/ 64 <500000000>;
32 opp-hz = /bits/ 64 <666666666>;
36 opp-hz = /bits/ 64 <744000000>;
A Dsun50i-h6-cpu-opp.dtsi13 opp-hz = /bits/ 64 <480000000>;
22 opp-hz = /bits/ 64 <720000000>;
31 opp-hz = /bits/ 64 <816000000>;
40 opp-hz = /bits/ 64 <888000000>;
49 opp-hz = /bits/ 64 <1080000000>;
58 opp-hz = /bits/ 64 <1320000000>;
67 opp-hz = /bits/ 64 <1488000000>;
76 opp-hz = /bits/ 64 <1608000000>;
85 opp-hz = /bits/ 64 <1704000000>;
94 opp-hz = /bits/ 64 <1800000000>;
A Dat91sam9261ek.dts45 bits-per-pixel = <16>;
131 ti,x-min = /bits/ 16 <150>;
132 ti,x-max = /bits/ 16 <3830>;
133 ti,y-min = /bits/ 16 <190>;
134 ti,y-max = /bits/ 16 <3830>;
136 ti,x-plate-ohms = /bits/ 16 <450>;
137 ti,y-plate-ohms = /bits/ 16 <250>;
138 ti,pressure-max = /bits/ 16 <15000>;
139 ti,debounce-rep = /bits/ 16 <0>;
140 ti,debounce-tol = /bits/ 16 <65535>;
[all …]
A Dzynqmp-zc1232-revA.dts73 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
74 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
75 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
76 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
77 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
78 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
79 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
80 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
A Domap3-panel-sharp-ls037v7dw01.dtsi64 ti,x-min = /bits/ 16 <0>;
65 ti,x-max = /bits/ 16 <8000>;
66 ti,y-min = /bits/ 16 <0>;
67 ti,y-max = /bits/ 16 <4800>;
68 ti,x-plate-ohms = /bits/ 16 <40>;
69 ti,pressure-max = /bits/ 16 <255>;
/u-boot/lib/zlib/
A Dinffast.c121 bits = state->bits; in inflate_fast()
130 if (bits < 15) { in inflate_fast()
132 bits += 8; in inflate_fast()
134 bits += 8; in inflate_fast()
140 bits -= op; in inflate_fast()
163 bits += 8; in inflate_fast()
165 bits += 8; in inflate_fast()
171 bits -= op; in inflate_fast()
326 len = bits >> 3; in inflate_fast()
328 bits -= len << 3; in inflate_fast()
[all …]
A Dinflate.c26 state->bits = 0; in inflateReset()
185 bits = state->bits; \
196 state->bits = bits; \
203 bits = 0; \
213 bits += 8; \
239 bits -= bits & 7; \
653 if ((unsigned)(this.bits) <= bits) break; in inflate()
733 if ((unsigned)(this.bits) <= bits) break; in inflate()
741 if ((unsigned)(last.bits + this.bits) <= bits) break; in inflate()
778 if ((unsigned)(this.bits) <= bits) break; in inflate()
[all …]
A Dinftrees.c33 code FAR * FAR *table, unsigned FAR *bits, in inflate_table() argument
109 root = *bits; in inflate_table()
115 this.bits = (unsigned char)1; in inflate_table()
119 *bits = 1; in inflate_table()
212 this.bits = (unsigned char)(len - drop); in inflate_table()
279 (*table)[low].bits = (unsigned char)root; in inflate_table()
292 this.bits = (unsigned char)(len - drop); in inflate_table()
300 this.bits = (unsigned char)len; in inflate_table()
320 *bits = root; in inflate_table()
/u-boot/arch/arm/mach-imx/mx7/
A Dddr.c156 bits++; in imx_ddr_size()
159 bits++; in imx_ddr_size()
162 bits++; in imx_ddr_size()
165 bits++; in imx_ddr_size()
169 bits++; in imx_ddr_size()
172 bits++; in imx_ddr_size()
175 bits++; in imx_ddr_size()
178 bits++; in imx_ddr_size()
182 bits++; in imx_ddr_size()
185 bits++; in imx_ddr_size()
[all …]
/u-boot/arch/arm/mach-imx/
A Dmmdc_size.c44 int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */ in imx_ddr_size() local
46 bits += ESD_MMDC_CTL_GET_ROW(ctl); in imx_ddr_size()
47 bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)]; in imx_ddr_size()
48 bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)]; in imx_ddr_size()
49 bits += ESD_MMDC_CTL_GET_WIDTH(ctl); in imx_ddr_size()
50 bits += ESD_MMDC_CTL_GET_CS1(ctl); in imx_ddr_size()
53 if (bits == 32) in imx_ddr_size()
56 return 1 << bits; in imx_ddr_size()
/u-boot/board/toradex/apalis_imx6/
A Dpf0100_otp.inc74 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
95 {pmic_i2c, 0xF1, 0x03}, // Set Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
104 {pmic_i2c, 0xF2, 0x03}, // Set Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
113 {pmic_i2c, 0xF3, 0x03}, // Set Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
122 {pmic_i2c, 0xF4, 0x03}, // Set Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
131 {pmic_i2c, 0xF5, 0x03}, // Set Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/u-boot/board/toradex/colibri_imx6/
A Dpf0100_otp.inc74 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
95 {pmic_i2c, 0xF1, 0x03}, // Set Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
104 {pmic_i2c, 0xF2, 0x03}, // Set Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
113 {pmic_i2c, 0xF3, 0x03}, // Set Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
122 {pmic_i2c, 0xF4, 0x03}, // Set Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
131 {pmic_i2c, 0xF5, 0x03}, // Set Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/u-boot/drivers/net/
A Dsmc91111.c861 if (bits[i] & MII_MDO) in smc_dump_mii_stream()
889 byte bits[64]; in smc_read_phy_register() local
932 bits[clk_idx++] = 0; in smc_read_phy_register()
940 bits[clk_idx++] = 0; in smc_read_phy_register()
943 bits[clk_idx++] = 0; in smc_read_phy_register()
990 smc_dump_mii_stream (bits, sizeof bits); in smc_read_phy_register()
1007 byte bits[65]; in smc_write_phy_register() local
1048 bits[clk_idx++] = 0; in smc_write_phy_register()
1049 bits[clk_idx++] = 0; in smc_write_phy_register()
1064 bits[clk_idx++] = 0; in smc_write_phy_register()
[all …]
/u-boot/scripts/dtc/
A Ddtc-parser.y47 int bits; member
342 unsigned long long bits; variable
344 bits = $2;
346 if ((bits != 8) && (bits != 16) &&
347 (bits != 32) && (bits != 64)) {
350 bits = 32;
354 $$.bits = bits;
359 $$.bits = 32;
363 if ($1.bits < 64) {
364 uint64_t mask = (1ULL << $1.bits) - 1;
[all …]
/u-boot/arch/arm/mach-sunxi/
A Dpmic_bus.c101 int pmic_bus_setbits(u8 reg, u8 bits) in pmic_bus_setbits() argument
110 if ((val & bits) == bits) in pmic_bus_setbits()
113 val |= bits; in pmic_bus_setbits()
117 int pmic_bus_clrbits(u8 reg, u8 bits) in pmic_bus_clrbits() argument
126 if (!(val & bits)) in pmic_bus_clrbits()
129 val &= ~bits; in pmic_bus_clrbits()
/u-boot/fs/jffs2/
A Dcompr_rubin.c46 void rubin_do_decompress(unsigned char *bits, unsigned char *in, in rubin_do_decompress() argument
92 i0 = (bits[i] * p) >> 8; in rubin_do_decompress()
115 unsigned char bits[8]; in dynrubin_decompress() local
119 bits[c] = (256 - data_in[c]); in dynrubin_decompress()
121 rubin_do_decompress(bits, data_in+8, cpage_out, dstlen); in dynrubin_decompress()
A Dmini_inflate.c37 stream->codes.bits = 8; in init_stream()
45 stream->lengths.bits = 16; in init_stream()
53 stream->distance.bits = 16; in init_stream()
67 const unsigned int bits) in pull_bits() argument
73 for (i = 0; i < bits; i++) { in pull_bits()
123 int bits = 0; in read_symbol() local
125 while (!(set->count[bits] && code < set->first[bits] + in read_symbol()
126 set->count[bits])) { in read_symbol()
128 if (++bits > set->bits) { in read_symbol()
134 return set->symbols[set->pos[bits] + code - set->first[bits]]; in read_symbol()
[all …]
/u-boot/tools/
A Drkmux.py28 self.bits, self.attr, self.reset_val, self.desc = (
32 self.bits = ''
38 self.bits, self.attr, self.reset_val = cols[0:3]
51 return '%s,%s,%s,%s' % (self.bits, self.attr, self.reset_val,
90 if ':' in regfield.bits:
91 bit_high, bit_low = [int(x) for x in regfield.bits.split(':')]
93 bit_high = bit_low = int(regfield.bits)
121 if field.bits:
192 if field.bits:
193 if field.bits != 'Bit':

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