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Searched refs:bnds (Results 1 – 16 of 16) sorted by relevance

/u-boot/board/freescale/corenet_ds/
A Dp4080ds_ddr.c78 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
79 .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS,
80 .cs[2].bnds = CONFIG_SYS_DDR_CS2_BNDS,
81 .cs[3].bnds = CONFIG_SYS_DDR_CS3_BNDS,
110 .cs[0].bnds = CONFIG_SYS_DDR2_CS0_BNDS,
111 .cs[1].bnds = CONFIG_SYS_DDR2_CS1_BNDS,
112 .cs[2].bnds = CONFIG_SYS_DDR2_CS2_BNDS,
142 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
143 .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS,
144 .cs[2].bnds = CONFIG_SYS_DDR_CS2_BNDS,
[all …]
/u-boot/board/freescale/ls1043ardb/
A Dddr.h49 .cs[0].bnds = 0x0000007F,
50 .cs[1].bnds = 0,
51 .cs[2].bnds = 0,
52 .cs[3].bnds = 0,
/u-boot/drivers/ddr/fsl/
A Dmpc85xx_ddr_gen1.c30 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
34 out_be32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
38 out_be32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
42 out_be32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dmpc86xx_ddr.c36 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
40 out_be32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
44 out_be32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
48 out_be32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dmpc85xx_ddr_gen3.c85 cs_sa = (regs->cs[i].bnds >> 16) & 0xfff; in fsl_ddr_set_memctl_regs()
86 cs_ea = regs->cs[i].bnds & 0xfff; in fsl_ddr_set_memctl_regs()
89 csn_bnds_backup = regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
92 *csn_bnds_t = regs->cs[i].bnds + 0x01000000; in fsl_ddr_set_memctl_regs()
94 *csn_bnds_t = regs->cs[i].bnds + 0x01000100; in fsl_ddr_set_memctl_regs()
97 csn, csn_bnds_backup, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
104 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
109 out_be32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
114 out_be32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
119 out_be32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
[all …]
A Dmpc85xx_ddr_gen2.c50 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
54 out_be32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
58 out_be32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
62 out_be32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dfsl_ddr_gen4.c125 (regs->cs[i].bnds & 0xfffefffe) >> 1); in fsl_ddr_set_memctl_regs()
130 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
138 (regs->cs[i].bnds & 0xfffefffe) >> 1); in fsl_ddr_set_memctl_regs()
140 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
148 (regs->cs[i].bnds & 0xfffefffe) >> 1); in fsl_ddr_set_memctl_regs()
150 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
158 (regs->cs[i].bnds & 0xfffefffe) >> 1); in fsl_ddr_set_memctl_regs()
160 ddr_out32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
532 ddr_out32(&ddr->cs0_bnds, regs->cs[0].bnds); in fsl_ddr_set_memctl_regs()
534 ddr_out32(&ddr->cs1_bnds, regs->cs[1].bnds); in fsl_ddr_set_memctl_regs()
[all …]
A Darm_ddr_gen3.c72 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
77 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
82 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
87 ddr_out32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
A Dinteractive.c614 CFG_REGS_CS(0, bnds), in print_fsl_memctl_config_regs()
618 CFG_REGS_CS(1, bnds), in print_fsl_memctl_config_regs()
623 CFG_REGS_CS(2, bnds), in print_fsl_memctl_config_regs()
628 CFG_REGS_CS(3, bnds), in print_fsl_memctl_config_regs()
705 CFG_REGS_CS(0, bnds), in fsl_ddr_regs_edit()
709 CFG_REGS_CS(1, bnds), in fsl_ddr_regs_edit()
714 CFG_REGS_CS(2, bnds), in fsl_ddr_regs_edit()
719 CFG_REGS_CS(3, bnds), in fsl_ddr_regs_edit()
A Dmain.c677 if (reg->cs[j].bnds == 0xffffffff) in fsl_ddr_compute()
679 end = reg->cs[j].bnds & 0xffff; in fsl_ddr_compute()
A Dctrl_regs.c2498 ddr->cs[i].bnds = (0 in compute_fsl_memctl_config_regs()
2504 ddr->cs[i].bnds = 0xffffffff; in compute_fsl_memctl_config_regs()
2507 debug("FSLDDR: cs[%d]_bnds = 0x%08x\n", i, ddr->cs[i].bnds); in compute_fsl_memctl_config_regs()
/u-boot/board/kontron/sl28/
A Dddr.c22 .cs[0].bnds = 0x0000007f,
24 .cs[1].bnds = 0x008000ff,
67 ddr_cfg_regs.cs[1].bnds = 0; in fsl_initdram()
/u-boot/board/freescale/p1010rdb/
A Dddr.c23 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
50 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
139 ddr_cfg_regs.cs[0].bnds = (CONFIG_SYS_DDR_CS0_BNDS >> 1) & 0x0fff0fff; in fixed_sdram()
/u-boot/board/Arcturus/ucp1020/
A Dddr.c83 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS, in fixed_sdram()
87 .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS, in fixed_sdram()
/u-boot/board/freescale/p1_p2_rdb_pc/
A Dddr.c212 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS, in fixed_sdram()
216 .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS, in fixed_sdram()
/u-boot/include/
A Dfsl_ddr_sdram.h244 unsigned int bnds; member

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