| /u-boot/drivers/clk/kendryte/ |
| A D | bypass.c | 68 if (bypass->child_count && bypass->saved_parents[0]) in k210_bypass_dobypass()
104 if (!bypass->child_count && !bypass->saved_parents[0]) { in k210_bypass_unbypass()
219 bypass->saved_parents = in k210_bypass_set_children()
221 if (!bypass->saved_parents) in k210_bypass_set_children()
225 bypass->children = children; in k210_bypass_set_children()
237 clk = &bypass->clk; in k210_register_bypass_struct()
253 struct k210_bypass *bypass; in k210_register_bypass() local
255 bypass = kzalloc(sizeof(*bypass), GFP_KERNEL); in k210_register_bypass()
256 if (!bypass) in k210_register_bypass()
261 bypass->alt = alt; in k210_register_bypass()
[all …]
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| A D | Makefile | 1 obj-y += bypass.o clk.o pll.o
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| A D | clk.c | 484 struct clk *in0_clk, *bypass; in k210_clk_probe() local
524 bypass = k210_register_bypass("pll0", in0, &pll->clk, in k210_clk_probe()
526 clk_dm(K210_CLK_PLL0, bypass); in k210_clk_probe()
576 k210_bypass_set_children(bypass, in k210_clk_probe()
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| /u-boot/include/kendryte/ |
| A D | bypass.h | 26 struct k210_bypass *bypass);
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| /u-boot/board/aristainetos/ |
| A D | axi.cfg | 19 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /u-boot/board/advantech/dms-ba16/ |
| A D | clocks.cfg | 12 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /u-boot/board/tqc/tqma6/ |
| A D | clocks.cfg | 21 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /u-boot/drivers/ram/aspeed/ |
| A D | Kconfig | 44 bool "bypass self test during DRAM initialization"
47 Say Y here to bypass DRAM self test to speed up the boot time
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| /u-boot/arch/arm/dts/ |
| A D | dra72-evm-tps65917.dtsi | 89 regulator-allow-bypass;
96 regulator-allow-bypass;
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| A D | dra76-evm.dts | 172 regulator-allow-bypass;
180 regulator-allow-bypass;
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| /u-boot/arch/arm/mach-tegra/tegra20/ |
| A D | warmboot_avp.c | 175 pllx_base.bypass = 1; in wb_start()
192 pllx_base.bypass = 0; in wb_start()
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| /u-boot/drivers/spi/ |
| A D | cadence_qspi.h | 85 unsigned int bypass, unsigned int delay);
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| /u-boot/board/boundary/nitrogen6x/ |
| A D | clocks.cfg | 27 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /u-boot/arch/arm/include/asm/arch-tegra/ |
| A D | warmboot.h | 81 u32 bypass:1; member
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| /u-boot/arch/mips/dts/ |
| A D | comtrend,wap-5813n.dts | 67 bypass-link;
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| A D | netgear,dgnd3700v2.dts | 56 bypass-link;
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| /u-boot/doc/device-tree-bindings/clock/ |
| A D | st,stm32mp1.txt | 103 0x0: bypass (division by 1)
195 - "st,bypass" configures the oscillator bypass mode (HSEBYP, LSEBYP)
196 - "st,digbypass" configures the bypass mode as full-swing digital
210 st,bypass;
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| /u-boot/doc/board/AndesTech/ |
| A D | adp-ag101p.rst | 25 If you want to boot this system from SPI ROM and bypass e-bios (the
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| /u-boot/drivers/clk/ |
| A D | clk_zynq.c | 136 u32 clk_ctrl, reset, pwrdwn, mul, bypass; in zynq_clk_get_pll_rate() local
145 bypass = clk_ctrl & PLLCTRL_BPFORCE_MASK; in zynq_clk_get_pll_rate()
146 if (bypass) in zynq_clk_get_pll_rate()
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| A D | clk_stm32mp1.c | 1447 static void stm32mp1_lse_enable(fdt_addr_t rcc, int bypass, int digbyp, in stm32mp1_lse_enable() argument
1455 if (bypass || digbyp) in stm32mp1_lse_enable()
1490 static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int digbyp, int css) in stm32mp1_hse_enable() argument
1494 if (bypass || digbyp) in stm32mp1_hse_enable()
1958 int bypass, digbyp; in stm32mp1_clktree() local
1962 bypass = dev_read_bool(dev, "st,bypass"); in stm32mp1_clktree()
1968 stm32mp1_lse_enable(rcc, bypass, digbyp, lsedrv); in stm32mp1_clktree()
1972 int bypass, digbyp, css; in stm32mp1_clktree() local
1975 bypass = dev_read_bool(dev, "st,bypass"); in stm32mp1_clktree()
1979 stm32mp1_hse_enable(rcc, bypass, digbyp, css); in stm32mp1_clktree()
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| /u-boot/drivers/clk/at91/ |
| A D | clk-main.c | 194 const char *parent_name, bool bypass) in at91_clk_main_osc() argument
210 if (bypass) { in at91_clk_main_osc()
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| A D | pmc.h | 83 const char *parent_name, bool bypass);
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| /u-boot/arch/powerpc/cpu/mpc83xx/initreg/ |
| A D | Kconfig.lcrr | 6 prompt "DLL bypass"
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| /u-boot/board/freescale/mx6qarm2/ |
| A D | imximage.cfg | 206 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
333 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /u-boot/board/ge/bx50v3/ |
| A D | bx50v3.cfg | 137 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
|