Home
last modified time | relevance | path

Searched refs:ccm_anatop (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/thermal/
A Dimx_thermal.c145 struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) in read_cpu_temperature() local
166 writel(TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_MASK, &ccm_anatop->tempsense1_clr); in read_cpu_temperature()
167 writel(PMU_REF_REFTOP_SELFBIASOFF_MASK, &ccm_anatop->ref_set); in read_cpu_temperature()
170 reg = readl(&ccm_anatop->tempsense1); in read_cpu_temperature()
173 writel(reg, &ccm_anatop->tempsense1); in read_cpu_temperature()
176 writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr); in read_cpu_temperature()
180 while ((readl(&ccm_anatop->tempsense1) & in read_cpu_temperature()
183 reg = readl(&ccm_anatop->tempsense1); in read_cpu_temperature()
194 reg = readl(&ccm_anatop->tempsense1); in read_cpu_temperature()
199 writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr); in read_cpu_temperature()
[all …]
/u-boot/arch/arm/mach-imx/mx7/
A Dclock.c119 reg = readl(&ccm_anatop->pll_arm); in decode_pll()
164 num = ccm_anatop->pll_ddr_num; in decode_pll()
192 reg = readl(&ccm_anatop->pll_480); in mxc_get_pll_sys_derive()
795 &ccm_anatop->pll_video_clr); in enable_pll_video()
803 &ccm_anatop->pll_video_set); in enable_pll_video()
809 &ccm_anatop->pll_video_set); in enable_pll_video()
815 &ccm_anatop->pll_video_set); in enable_pll_video()
821 &ccm_anatop->pll_video_set); in enable_pll_video()
828 &ccm_anatop->pll_video_set); in enable_pll_video()
833 &ccm_anatop->pll_video_num); in enable_pll_video()
[all …]
A Dsoc.c152 struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) in get_cpu_rev() local
154 u32 reg = readl(&ccm_anatop->digprog); in get_cpu_rev()

Completed in 9 milliseconds