Searched refs:cfg_rcw5 (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A D	fsl_lsch2_serdes.c	151 u32 cfg_rcw5 = gur_in32(&gur->rcwsr[5]); in setup_serdes_volt() local 200 cfg_tmp = (cfg_rcw5 >> 22) & 0x3; in setup_serdes_volt() 216 cfg_tmp = (cfg_rcw5 >> 20) & 0x3; in setup_serdes_volt() 263 cfg_tmp = (cfg_rcw5 >> 22) & 0x3; in setup_serdes_volt() 289 cfg_tmp = (cfg_rcw5 >> 20) & 0x3; in setup_serdes_volt() 319 cfg_tmp = (cfg_rcw5 >> 22) & 0x3; in setup_serdes_volt() 339 cfg_tmp = (cfg_rcw5 >> 20) & 0x3; in setup_serdes_volt() 380 cfg_tmp = (cfg_rcw5 >> 22) & 0x3; in setup_serdes_volt() 391 cfg_tmp = (cfg_rcw5 >> 20) & 0x3; in setup_serdes_volt()

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