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Searched refs:channel0_cif_tx0_ctrl (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/sound/
A Dtegra_ahub.c125 writel(value, &priv->apbif_regs->channel0_cif_tx0_ctrl); in tegra_ahub_apbif_set_cif()
/u-boot/arch/arm/include/asm/arch-tegra/
A Dtegra_ahub.h60 u32 channel0_cif_tx0_ctrl; /* APBIF_AUDIOCIF_TX0_CTRL */ member

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